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staging: tidspbridge: use omap_dsp_platform_data

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Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Felipe Contreras 2010-10-04 19:09:15 +03:00 committed by Greg Kroah-Hartman
parent 90173882ed
commit 82d4b4776d
5 changed files with 25 additions and 36 deletions
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14
drivers/staging/tidspbridge/core/tiomap3430.c
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@ -16,6 +16,8 @@
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#include <plat/dsp.h>
#include <linux/types.h>
/* ----------------------------------- Host OS */
#include <dspbridge/host_os.h>
@ -265,8 +267,8 @@ static int bridge_brd_monitor(struct bridge_dev_context *dev_ctxt)
{
struct bridge_dev_context *dev_context = dev_ctxt;
u32 temp;
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
temp = (*pdata->dsp_prm_read)(OMAP3430_IVA2_MOD, OMAP2_PM_PWSTST) &
OMAP_POWERSTATEST_MASK;
@ -376,8 +378,8 @@ static int bridge_brd_start(struct bridge_dev_context *dev_ctxt,
u32 clk_cmd;
struct io_mgr *hio_mgr;
u32 ul_load_monitor_timer;
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
mmu = dev_context->dsp_mmu;
/* The device context contains all the mmu setup info from when the
@ -582,8 +584,8 @@ static int bridge_brd_stop(struct bridge_dev_context *dev_ctxt)
struct bridge_dev_context *dev_context = dev_ctxt;
struct pg_table_attrs *pt_attrs;
u32 dsp_pwr_state;
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
if (dev_context->dw_brd_state == BRD_STOPPED)
return status;

14
drivers/staging/tidspbridge/core/tiomap3430_pwr.c
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@ -19,6 +19,8 @@
/* ----------------------------------- Host OS */
#include <dspbridge/host_os.h>
#include <plat/dsp.h>
/* ----------------------------------- DSP/BIOS Bridge */
#include <dspbridge/dbdefs.h>
#include <dspbridge/drv.h>
@ -56,8 +58,8 @@ int handle_constraints_set(struct bridge_dev_context *dev_context,
{
#ifdef CONFIG_TIDSPBRIDGE_DVFS
u32 *constraint_val;
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
constraint_val = (u32 *) (pargs);
/* Read the target value requested by DSP */
@ -85,8 +87,8 @@ int handle_hibernation_from_dsp(struct bridge_dev_context *dev_context)
u32 opplevel;
struct io_mgr *hio_mgr;
#endif
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
pwr_state = (*pdata->dsp_prm_read)(OMAP3430_IVA2_MOD, OMAP2_PM_PWSTST) &
OMAP_POWERSTATEST_MASK;
@ -154,8 +156,8 @@ int sleep_dsp(struct bridge_dev_context *dev_context, u32 dw_cmd,
#endif /* CONFIG_TIDSPBRIDGE_NTFY_PWRERR */
u16 timeout = PWRSTST_TIMEOUT / 10;
u32 pwr_state, target_pwr_state;
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
/* Check if sleep code is valid */
if ((dw_cmd != PWR_DEEPSLEEP) && (dw_cmd != PWR_EMERGENCYDEEPSLEEP))

4
drivers/staging/tidspbridge/core/tiomap_io.c
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@ -16,6 +16,8 @@
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*/
#include <plat/dsp.h>
/* ----------------------------------- DSP/BIOS Bridge */
#include <dspbridge/dbdefs.h>
@ -387,7 +389,7 @@ int sm_interrupt_dsp(struct bridge_dev_context *dev_context, u16 mb_val)
#ifdef CONFIG_TIDSPBRIDGE_DVFS
u32 opplevel = 0;
#endif
struct dspbridge_platform_data *pdata =
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct cfg_hostres *resources = dev_context->resources;
int status = 0;

19
drivers/staging/tidspbridge/include/dspbridge/host_os.h
View File

@ -52,25 +52,6 @@
/* TODO -- Remove, once BP defines them */
#define INT_DSP_MMU_IRQ 28
struct dspbridge_platform_data {
void (*dsp_set_min_opp) (u8 opp_id);
u8(*dsp_get_opp) (void);
void (*cpu_set_freq) (unsigned long f);
unsigned long (*cpu_get_freq) (void);
unsigned long mpu_speed[6];
/* functions to write and read PRCM registers */
void (*dsp_prm_write)(u32, s16 , u16);
u32 (*dsp_prm_read)(s16 , u16);
u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
void (*dsp_cm_write)(u32, s16 , u16);
u32 (*dsp_cm_read)(s16 , u16);
u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
u32 phys_mempool_base;
u32 phys_mempool_size;
};
#define PRCM_VDD1 1
extern struct platform_device *omap_dspbridge_dev;

10
drivers/staging/tidspbridge/rmgr/drv_interface.c
View File

@ -18,6 +18,8 @@
/* ----------------------------------- Host OS */
#include <plat/dsp.h>
#include <dspbridge/host_os.h>
#include <linux/types.h>
#include <linux/platform_device.h>
@ -169,7 +171,7 @@ const struct omap_opp vdd1_rate_table_bridge[] = {
#endif
#endif
struct dspbridge_platform_data *omap_dspbridge_pdata;
struct omap_dsp_platform_data *omap_dspbridge_pdata;
u32 vdd1_dsp_freq[6][4] = {
{0, 0, 0, 0},
@ -216,8 +218,8 @@ void bridge_recover_schedule(void)
static int dspbridge_scale_notification(struct notifier_block *op,
unsigned long val, void *ptr)
{
struct dspbridge_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
struct omap_dsp_platform_data *pdata =
omap_dspbridge_dev->dev.platform_data;
if (CPUFREQ_POSTCHANGE == val && pdata->dsp_get_opp)
pwr_pm_post_scale(PRCM_VDD1, pdata->dsp_get_opp());
@ -240,7 +242,7 @@ static struct notifier_block iva_clk_notifier = {
*/
static int omap3_bridge_startup(struct platform_device *pdev)
{
struct dspbridge_platform_data *pdata = pdev->dev.platform_data;
struct omap_dsp_platform_data *pdata = pdev->dev.platform_data;
struct drv_data *drv_datap = NULL;
u32 phys_membase, phys_memsize;
int err;