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dma-mapping: remove the DMA_MEMORY_EXCLUSIVE flag
All users of dma_declare_coherent want their allocations to be exclusive, so default to exclusive allocations. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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91a6fda95c
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@ -566,8 +566,7 @@ boundaries when doing this.
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int
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dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int
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flags)
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dma_addr_t device_addr, size_t size);
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Declare region of memory to be handed out by dma_alloc_coherent() when
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it's asked for coherent memory for this device.
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@ -581,12 +580,6 @@ dma_addr_t in dma_alloc_coherent()).
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size is the size of the area (must be multiples of PAGE_SIZE).
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flags can be ORed together and are:
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- DMA_MEMORY_EXCLUSIVE - only allocate memory from the declared regions.
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Do not allow dma_alloc_coherent() to fall back to system memory when
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it's out of memory in the declared region.
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As a simplification for the platforms, only *one* such region of
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memory may be declared per device.
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@ -258,8 +258,7 @@ static void __init visstrim_analog_camera_init(void)
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return;
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dma_declare_coherent_memory(&pdev->dev, mx2_camera_base,
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mx2_camera_base, MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_EXCLUSIVE);
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mx2_camera_base, MX2_CAMERA_BUF_SIZE);
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}
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static void __init visstrim_reserve(void)
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@ -445,8 +444,7 @@ static void __init visstrim_coda_init(void)
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dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base + MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_EXCLUSIVE);
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MX2_CAMERA_BUF_SIZE);
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}
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/* DMA deinterlace */
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@ -465,8 +463,7 @@ static void __init visstrim_deinterlace_init(void)
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dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
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mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_EXCLUSIVE);
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MX2_CAMERA_BUF_SIZE);
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}
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/* Emma-PrP for format conversion */
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@ -485,8 +482,7 @@ static void __init visstrim_emmaprp_init(void)
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*/
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ret = dma_declare_coherent_memory(&pdev->dev,
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mx2_camera_base, mx2_camera_base,
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MX2_CAMERA_BUF_SIZE,
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DMA_MEMORY_EXCLUSIVE);
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MX2_CAMERA_BUF_SIZE);
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if (ret)
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pr_err("Failed to declare memory for emmaprp\n");
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}
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@ -475,8 +475,7 @@ static int __init mx31moboard_init_cam(void)
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ret = dma_declare_coherent_memory(&pdev->dev,
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mx3_camera_base, mx3_camera_base,
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MX3_CAMERA_BUF_SIZE,
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DMA_MEMORY_EXCLUSIVE);
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MX3_CAMERA_BUF_SIZE);
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if (ret)
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goto err;
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@ -529,9 +529,8 @@ static int __init ap325rxa_devices_setup(void)
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device_initialize(&ap325rxa_ceu_device.dev);
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arch_setup_pdev_archdata(&ap325rxa_ceu_device);
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dma_declare_coherent_memory(&ap325rxa_ceu_device.dev,
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ceu_dma_membase, ceu_dma_membase,
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ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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ceu_dma_membase, ceu_dma_membase,
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ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(&ap325rxa_ceu_device);
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@ -1440,8 +1440,7 @@ static int __init arch_setup(void)
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dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev,
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ceu0_dma_membase, ceu0_dma_membase,
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ceu0_dma_membase +
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CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(ecovec_ceu_devices[0]);
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device_initialize(&ecovec_ceu_devices[1]->dev);
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@ -1449,8 +1448,7 @@ static int __init arch_setup(void)
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dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev,
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ceu1_dma_membase, ceu1_dma_membase,
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ceu1_dma_membase +
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CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(ecovec_ceu_devices[1]);
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gpiod_add_lookup_table(&cn12_power_gpiod_table);
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@ -603,9 +603,8 @@ static int __init kfr2r09_devices_setup(void)
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device_initialize(&kfr2r09_ceu_device.dev);
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arch_setup_pdev_archdata(&kfr2r09_ceu_device);
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dma_declare_coherent_memory(&kfr2r09_ceu_device.dev,
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ceu_dma_membase, ceu_dma_membase,
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ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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ceu_dma_membase, ceu_dma_membase,
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ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(&kfr2r09_ceu_device);
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@ -603,9 +603,8 @@ static int __init migor_devices_setup(void)
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device_initialize(&migor_ceu_device.dev);
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arch_setup_pdev_archdata(&migor_ceu_device);
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dma_declare_coherent_memory(&migor_ceu_device.dev,
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ceu_dma_membase, ceu_dma_membase,
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ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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ceu_dma_membase, ceu_dma_membase,
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ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(&migor_ceu_device);
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@ -941,8 +941,7 @@ static int __init devices_setup(void)
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dma_declare_coherent_memory(&ms7724se_ceu_devices[0]->dev,
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ceu0_dma_membase, ceu0_dma_membase,
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ceu0_dma_membase +
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CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(ms7724se_ceu_devices[0]);
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device_initialize(&ms7724se_ceu_devices[1]->dev);
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@ -950,8 +949,7 @@ static int __init devices_setup(void)
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dma_declare_coherent_memory(&ms7724se_ceu_devices[1]->dev,
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ceu1_dma_membase, ceu1_dma_membase,
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ceu1_dma_membase +
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CEU_BUFFER_MEMORY_SIZE - 1,
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DMA_MEMORY_EXCLUSIVE);
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CEU_BUFFER_MEMORY_SIZE - 1);
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platform_device_add(ms7724se_ceu_devices[1]);
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return platform_add_devices(ms7724se_devices,
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@ -63,8 +63,7 @@ static void gapspci_fixup_resources(struct pci_dev *dev)
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BUG_ON(dma_declare_coherent_memory(&dev->dev,
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res.start,
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region.start,
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resource_size(&res),
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DMA_MEMORY_EXCLUSIVE));
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resource_size(&res)));
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break;
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default:
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printk("PCI: Failed resource fixup\n");
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@ -1708,8 +1708,7 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
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if (res) {
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err = dma_declare_coherent_memory(&pdev->dev, res->start,
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res->start,
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resource_size(res),
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DMA_MEMORY_EXCLUSIVE);
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resource_size(res));
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if (err) {
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dev_err(&pdev->dev, "Unable to declare CEU memory.\n");
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return err;
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@ -126,8 +126,7 @@ static int ohci_hcd_sm501_drv_probe(struct platform_device *pdev)
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retval = dma_declare_coherent_memory(dev, mem->start,
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mem->start - mem->parent->start,
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resource_size(mem),
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DMA_MEMORY_EXCLUSIVE);
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resource_size(mem));
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if (retval) {
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dev_err(dev, "cannot declare coherent memory\n");
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goto err1;
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@ -225,7 +225,7 @@ static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
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}
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ret = dma_declare_coherent_memory(&dev->dev, sram->start, sram->start,
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resource_size(sram), DMA_MEMORY_EXCLUSIVE);
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resource_size(sram));
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if (ret)
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goto err_dma_declare;
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@ -736,17 +736,14 @@ static inline int dma_get_cache_alignment(void)
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return 1;
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}
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/* flags for the coherent memory api */
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#define DMA_MEMORY_EXCLUSIVE 0x01
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#ifdef CONFIG_DMA_DECLARE_COHERENT
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int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int flags);
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dma_addr_t device_addr, size_t size);
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void dma_release_declared_memory(struct device *dev);
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#else
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static inline int
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dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int flags)
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dma_addr_t device_addr, size_t size)
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{
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return -ENOSYS;
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}
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@ -14,7 +14,6 @@ struct dma_coherent_mem {
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dma_addr_t device_base;
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unsigned long pfn_base;
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int size;
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int flags;
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unsigned long *bitmap;
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spinlock_t spinlock;
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bool use_dev_dma_pfn_offset;
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@ -38,9 +37,9 @@ static inline dma_addr_t dma_get_device_base(struct device *dev,
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return mem->device_base;
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}
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static int dma_init_coherent_memory(
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phys_addr_t phys_addr, dma_addr_t device_addr, size_t size, int flags,
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struct dma_coherent_mem **mem)
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static int dma_init_coherent_memory(phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size,
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struct dma_coherent_mem **mem)
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{
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struct dma_coherent_mem *dma_mem = NULL;
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void *mem_base = NULL;
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@ -73,7 +72,6 @@ static int dma_init_coherent_memory(
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dma_mem->device_base = device_addr;
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dma_mem->pfn_base = PFN_DOWN(phys_addr);
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dma_mem->size = pages;
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dma_mem->flags = flags;
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spin_lock_init(&dma_mem->spinlock);
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*mem = dma_mem;
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@ -110,12 +108,12 @@ static int dma_assign_coherent_memory(struct device *dev,
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}
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int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size, int flags)
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dma_addr_t device_addr, size_t size)
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{
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struct dma_coherent_mem *mem;
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int ret;
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ret = dma_init_coherent_memory(phys_addr, device_addr, size, flags, &mem);
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ret = dma_init_coherent_memory(phys_addr, device_addr, size, &mem);
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if (ret)
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return ret;
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@ -190,15 +188,7 @@ int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
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return 0;
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*ret = __dma_alloc_from_coherent(mem, size, dma_handle);
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if (*ret)
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return 1;
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/*
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* In the case where the allocation can not be satisfied from the
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* per-device area, try to fall back to generic memory if the
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* constraints allow it.
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*/
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return mem->flags & DMA_MEMORY_EXCLUSIVE;
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return 1;
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}
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void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle)
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@ -327,8 +317,7 @@ static int rmem_dma_device_init(struct reserved_mem *rmem, struct device *dev)
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if (!mem) {
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ret = dma_init_coherent_memory(rmem->base, rmem->base,
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rmem->size,
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DMA_MEMORY_EXCLUSIVE, &mem);
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rmem->size, &mem);
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if (ret) {
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pr_err("Reserved memory: failed to init DMA memory pool at %pa, size %ld MiB\n",
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&rmem->base, (unsigned long)rmem->size / SZ_1M);
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