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drm/msm: Add a helper function for in-kernel buffer allocations
Nearly all of the buffer allocations for kernel allocate an buffer object, virtual address and GPU iova at the same time. Make a helper function to handle the details. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> [dropped msm_fbdev conversion to new helper, since it interferes with display-handover work, where we want to separate allocation and mapping] Signed-off-by: Rob Clark <robdclark@gmail.com>
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1267a4dfe0
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8223286d62
@ -284,28 +284,14 @@ static int a5xx_me_init(struct msm_gpu *gpu)
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static struct drm_gem_object *a5xx_ucode_load_bo(struct msm_gpu *gpu,
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const struct firmware *fw, u64 *iova)
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{
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struct drm_device *drm = gpu->dev;
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struct drm_gem_object *bo;
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void *ptr;
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bo = msm_gem_new_locked(drm, fw->size - 4, MSM_BO_UNCACHED);
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if (IS_ERR(bo))
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return bo;
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ptr = msm_gem_kernel_new_locked(gpu->dev, fw->size - 4,
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MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, &bo, iova);
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ptr = msm_gem_get_vaddr(bo);
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if (!ptr) {
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drm_gem_object_unreference(bo);
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return ERR_PTR(-ENOMEM);
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}
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if (iova) {
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int ret = msm_gem_get_iova(bo, gpu->aspace, iova);
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if (ret) {
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drm_gem_object_unreference(bo);
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return ERR_PTR(ret);
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}
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}
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if (IS_ERR(ptr))
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return ERR_CAST(ptr);
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memcpy(ptr, &fw->data[4], fw->size - 4);
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@ -294,16 +294,10 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
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*/
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bosize = (cmds_size + (cmds_size / TYPE4_MAX_PAYLOAD) + 1) << 2;
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a5xx_gpu->gpmu_bo = msm_gem_new_locked(drm, bosize, MSM_BO_UNCACHED);
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if (IS_ERR(a5xx_gpu->gpmu_bo))
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goto err;
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if (msm_gem_get_iova(a5xx_gpu->gpmu_bo, gpu->aspace,
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&a5xx_gpu->gpmu_iova))
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goto err;
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ptr = msm_gem_get_vaddr(a5xx_gpu->gpmu_bo);
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if (!ptr)
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ptr = msm_gem_kernel_new_locked(drm, bosize,
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MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace,
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&a5xx_gpu->gpmu_bo, &a5xx_gpu->gpmu_iova);
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if (IS_ERR(ptr))
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goto err;
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while (cmds_size > 0) {
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@ -391,31 +391,19 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
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return ret;
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}
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adreno_gpu->memptrs_bo = msm_gem_new(drm, sizeof(*adreno_gpu->memptrs),
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MSM_BO_UNCACHED);
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if (IS_ERR(adreno_gpu->memptrs_bo)) {
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ret = PTR_ERR(adreno_gpu->memptrs_bo);
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adreno_gpu->memptrs_bo = NULL;
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dev_err(drm->dev, "could not allocate memptrs: %d\n", ret);
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return ret;
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}
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adreno_gpu->memptrs = msm_gem_kernel_new(drm,
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sizeof(*adreno_gpu->memptrs), MSM_BO_UNCACHED, gpu->aspace,
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&adreno_gpu->memptrs_bo, &adreno_gpu->memptrs_iova);
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adreno_gpu->memptrs = msm_gem_get_vaddr(adreno_gpu->memptrs_bo);
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if (IS_ERR(adreno_gpu->memptrs)) {
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dev_err(drm->dev, "could not vmap memptrs\n");
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return -ENOMEM;
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ret = PTR_ERR(adreno_gpu->memptrs);
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adreno_gpu->memptrs = NULL;
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dev_err(drm->dev, "could not allocate memptrs: %d\n", ret);
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}
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ret = msm_gem_get_iova(adreno_gpu->memptrs_bo, gpu->aspace,
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&adreno_gpu->memptrs_iova);
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if (ret) {
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dev_err(drm->dev, "could not map memptrs: %d\n", ret);
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return ret;
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}
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return 0;
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}
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void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
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{
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struct msm_gpu *gpu = &adreno_gpu->base;
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@ -237,6 +237,12 @@ struct drm_gem_object *msm_gem_new(struct drm_device *dev,
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uint32_t size, uint32_t flags);
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struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
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uint32_t size, uint32_t flags);
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void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
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uint32_t flags, struct msm_gem_address_space *aspace,
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struct drm_gem_object **bo, uint64_t *iova);
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void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
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uint32_t flags, struct msm_gem_address_space *aspace,
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struct drm_gem_object **bo, uint64_t *iova);
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struct drm_gem_object *msm_gem_import(struct drm_device *dev,
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struct dma_buf *dmabuf, struct sg_table *sgt);
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@ -1024,3 +1024,49 @@ fail:
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drm_gem_object_unreference_unlocked(obj);
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return ERR_PTR(ret);
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}
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static void *_msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
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uint32_t flags, struct msm_gem_address_space *aspace,
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struct drm_gem_object **bo, uint64_t *iova, bool locked)
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{
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void *vaddr;
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struct drm_gem_object *obj = _msm_gem_new(dev, size, flags, locked);
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int ret;
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if (IS_ERR(obj))
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return ERR_CAST(obj);
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if (iova) {
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ret = msm_gem_get_iova(obj, aspace, iova);
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if (ret) {
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drm_gem_object_unreference(obj);
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return ERR_PTR(ret);
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}
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}
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vaddr = msm_gem_get_vaddr(obj);
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if (!vaddr) {
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msm_gem_put_iova(obj, aspace);
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drm_gem_object_unreference(obj);
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return ERR_PTR(-ENOMEM);
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}
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if (bo)
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*bo = obj;
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return vaddr;
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}
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void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
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uint32_t flags, struct msm_gem_address_space *aspace,
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struct drm_gem_object **bo, uint64_t *iova)
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{
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return _msm_gem_kernel_new(dev, size, flags, aspace, bo, iova, false);
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}
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void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
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uint32_t flags, struct msm_gem_address_space *aspace,
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struct drm_gem_object **bo, uint64_t *iova)
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{
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return _msm_gem_kernel_new(dev, size, flags, aspace, bo, iova, true);
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}
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@ -33,16 +33,14 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size)
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}
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ring->gpu = gpu;
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ring->bo = msm_gem_new(gpu->dev, size, MSM_BO_WC);
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if (IS_ERR(ring->bo)) {
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ret = PTR_ERR(ring->bo);
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ring->bo = NULL;
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goto fail;
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}
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ring->start = msm_gem_get_vaddr(ring->bo);
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/* Pass NULL for the iova pointer - we will map it later */
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ring->start = msm_gem_kernel_new(gpu->dev, size, MSM_BO_WC,
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gpu->aspace, &ring->bo, NULL);
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if (IS_ERR(ring->start)) {
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ret = PTR_ERR(ring->start);
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ring->start = 0;
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goto fail;
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}
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ring->end = ring->start + (size / 4);
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