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drm/i915/skl: Program the DDB allocation
v2: Adapt to the planes/cursor split Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4696,6 +4696,8 @@ enum punit_power_well {
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#define _PLANE_KEYMSK_2_A 0x70298
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#define _PLANE_KEYMAX_1_A 0x701a0
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#define _PLANE_KEYMAX_2_A 0x702a0
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#define _PLANE_BUF_CFG_1_A 0x7027c
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#define _PLANE_BUF_CFG_2_A 0x7037c
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#define _PLANE_CTL_1_B 0x71180
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#define _PLANE_CTL_2_B 0x71280
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@ -4773,6 +4775,20 @@ enum punit_power_well {
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#define PLANE_KEYMAX(pipe, plane) \
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_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe))
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#define _PLANE_BUF_CFG_1_B 0x7127c
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#define _PLANE_BUF_CFG_2_B 0x7137c
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#define _PLANE_BUF_CFG_1(pipe) \
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_PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B)
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#define _PLANE_BUF_CFG_2(pipe) \
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_PIPE(pipe, _PLANE_BUF_CFG_2_A, _PLANE_BUF_CFG_2_B)
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#define PLANE_BUF_CFG(pipe, plane) \
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_PLANE(plane, _PLANE_BUF_CFG_1(pipe), _PLANE_BUF_CFG_2(pipe))
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/* SKL new cursor registers */
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#define _CUR_BUF_CFG_A 0x7017c
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#define _CUR_BUF_CFG_B 0x7117c
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#define CUR_BUF_CFG(pipe) _PIPE(pipe, _CUR_BUF_CFG_A, _CUR_BUF_CFG_B)
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/* VBIOS regs */
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#define VGACNTRL 0x71400
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# define VGA_DISP_DISABLE (1 << 31)
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@ -3426,6 +3426,15 @@ static void skl_write_wm_values(struct drm_i915_private *dev_priv,
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I915_WRITE(PLANE_WM_TRANS(pipe, i),
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new->plane_trans[pipe][i]);
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I915_WRITE(CUR_WM_TRANS(pipe), new->cursor_trans[pipe]);
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for (i = 0; i < intel_num_planes(crtc); i++)
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I915_WRITE(PLANE_BUF_CFG(pipe, i),
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new->ddb.plane[pipe][i].end << 16 |
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new->ddb.plane[pipe][i].start);
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I915_WRITE(CUR_BUF_CFG(pipe),
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new->ddb.cursor[pipe].end << 16 |
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new->ddb.cursor[pipe].start);
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}
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}
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