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net/mlx5: E-Switch, Consider ECPF vport depends on eswitch ownership
ECPF connects to the eswitch through vport 0xfffe. ECPF may or may not be the eswitch manager depending on firmware configuration. 1. If ECPF is eswitch manager: ECPF will take over the eswitch manager responsibility. A rep of the host PF shall be created at the ECPF side for the eswitch manager to control. 2. If ECPF is not eswitch manager: host PF will be the eswitch manager, ECPF acts similar as a VF to the host PF. Host PF will be aware of the ECPF vport presence and control it's rep. Signed-off-by: Bodong Wang <bodong@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -1667,7 +1667,7 @@ int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
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mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);
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mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
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err = esw_offloads_init(esw, nvfs,
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nvfs + MLX5_SPECIAL_VPORTS);
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nvfs + MLX5_SPECIAL_VPORTS(esw->dev));
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}
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if (err)
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@ -1687,6 +1687,12 @@ int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
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vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);
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esw_enable_vport(esw, vport, enabled_events);
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/* Enable ECPF vports */
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if (mlx5_ecpf_vport_exists(esw->dev)) {
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vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_ECPF);
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esw_enable_vport(esw, vport, enabled_events);
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}
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/* Enable VF vports */
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mlx5_esw_for_each_vf_vport(esw, i, vport, nvfs)
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esw_enable_vport(esw, vport, enabled_events);
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@ -380,9 +380,20 @@ static inline int mlx5_eswitch_uplink_idx(struct mlx5_eswitch *esw)
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return esw->total_vports - 1;
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}
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static inline int mlx5_eswitch_ecpf_idx(struct mlx5_eswitch *esw)
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{
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return esw->total_vports - 2;
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}
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static inline int mlx5_eswitch_vport_num_to_index(struct mlx5_eswitch *esw,
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u16 vport_num)
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{
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if (vport_num == MLX5_VPORT_ECPF) {
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if (!mlx5_ecpf_vport_exists(esw->dev))
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esw_warn(esw->dev, "ECPF vport doesn't exist!\n");
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return mlx5_eswitch_ecpf_idx(esw);
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}
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if (vport_num == MLX5_VPORT_UPLINK)
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return mlx5_eswitch_uplink_idx(esw);
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@ -392,6 +403,10 @@ static inline int mlx5_eswitch_vport_num_to_index(struct mlx5_eswitch *esw,
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static inline int mlx5_eswitch_index_to_vport_num(struct mlx5_eswitch *esw,
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int index)
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{
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if (index == mlx5_eswitch_ecpf_idx(esw) &&
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mlx5_ecpf_vport_exists(esw->dev))
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return MLX5_VPORT_ECPF;
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if (index == mlx5_eswitch_uplink_idx(esw))
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return MLX5_VPORT_UPLINK;
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@ -639,14 +639,35 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,
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misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
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misc_parameters);
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if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {
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MLX5_SET(fte_match_set_misc, misc, source_port, MLX5_VPORT_PF);
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flow = mlx5_add_flow_rules(esw->fdb_table.offloads.slow_fdb,
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spec, &flow_act, &dest, 1);
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if (IS_ERR(flow)) {
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err = PTR_ERR(flow);
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goto add_pf_flow_err;
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}
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flows[MLX5_VPORT_PF] = flow;
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}
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if (mlx5_ecpf_vport_exists(esw->dev)) {
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MLX5_SET(fte_match_set_misc, misc, source_port, MLX5_VPORT_ECPF);
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flow = mlx5_add_flow_rules(esw->fdb_table.offloads.slow_fdb,
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spec, &flow_act, &dest, 1);
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if (IS_ERR(flow)) {
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err = PTR_ERR(flow);
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goto add_ecpf_flow_err;
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}
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flows[mlx5_eswitch_ecpf_idx(esw)] = flow;
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}
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mlx5_esw_for_each_vf_vport(esw, i, mlx5_core_max_vfs(esw->dev)) {
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MLX5_SET(fte_match_set_misc, misc, source_port, i);
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flow = mlx5_add_flow_rules(esw->fdb_table.offloads.slow_fdb,
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spec, &flow_act, &dest, 1);
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if (IS_ERR(flow)) {
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err = PTR_ERR(flow);
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esw_warn(esw->dev, "FDB: Failed to add peer miss flow rule err %d\n", err);
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goto add_flow_err;
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goto add_vf_flow_err;
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}
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flows[i] = flow;
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}
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@ -656,10 +677,18 @@ static int esw_add_fdb_peer_miss_rules(struct mlx5_eswitch *esw,
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kvfree(spec);
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return 0;
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add_flow_err:
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add_vf_flow_err:
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nvports = --i;
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mlx5_esw_for_each_vf_vport_reverse(esw, i, nvports)
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mlx5_del_flow_rules(flows[i]);
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if (mlx5_ecpf_vport_exists(esw->dev))
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mlx5_del_flow_rules(flows[mlx5_eswitch_ecpf_idx(esw)]);
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add_ecpf_flow_err:
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if (mlx5_core_is_ecpf_esw_manager(esw->dev))
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mlx5_del_flow_rules(flows[MLX5_VPORT_PF]);
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add_pf_flow_err:
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esw_warn(esw->dev, "FDB: Failed to add peer miss flow rule err %d\n", err);
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kvfree(flows);
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alloc_flows_err:
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kvfree(spec);
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@ -676,6 +705,12 @@ static void esw_del_fdb_peer_miss_rules(struct mlx5_eswitch *esw)
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mlx5_esw_for_each_vf_vport_reverse(esw, i, mlx5_core_max_vfs(esw->dev))
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mlx5_del_flow_rules(flows[i]);
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if (mlx5_ecpf_vport_exists(esw->dev))
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mlx5_del_flow_rules(flows[mlx5_eswitch_ecpf_idx(esw)]);
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if (mlx5_core_is_ecpf_esw_manager(esw->dev))
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mlx5_del_flow_rules(flows[MLX5_VPORT_PF]);
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kvfree(flows);
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}
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@ -1288,6 +1323,16 @@ static void __unload_reps_special_vport(struct mlx5_eswitch *esw, u8 rep_type)
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{
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struct mlx5_eswitch_rep *rep;
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if (mlx5_ecpf_vport_exists(esw->dev)) {
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_ECPF);
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__esw_offloads_unload_rep(esw, rep, rep_type);
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}
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if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_PF);
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__esw_offloads_unload_rep(esw, rep, rep_type);
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}
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_UPLINK);
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__esw_offloads_unload_rep(esw, rep, rep_type);
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}
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@ -1351,6 +1396,34 @@ static int __load_reps_special_vport(struct mlx5_eswitch *esw, u8 rep_type)
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_UPLINK);
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err = __esw_offloads_load_rep(esw, rep, rep_type);
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if (err)
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return err;
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if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_PF);
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err = __esw_offloads_load_rep(esw, rep, rep_type);
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if (err)
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goto err_pf;
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}
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if (mlx5_ecpf_vport_exists(esw->dev)) {
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_ECPF);
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err = __esw_offloads_load_rep(esw, rep, rep_type);
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if (err)
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goto err_ecpf;
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}
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return 0;
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err_ecpf:
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if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_PF);
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__esw_offloads_unload_rep(esw, rep, rep_type);
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}
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err_pf:
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rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_UPLINK);
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__esw_offloads_unload_rep(esw, rep, rep_type);
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return err;
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}
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@ -1088,6 +1088,11 @@ static inline bool mlx5_core_is_ecpf_esw_manager(struct mlx5_core_dev *dev)
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return dev->caps.embedded_cpu && MLX5_CAP_GEN(dev, eswitch_manager);
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}
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static inline bool mlx5_ecpf_vport_exists(struct mlx5_core_dev *dev)
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{
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return mlx5_core_is_pf(dev) && MLX5_CAP_ESW(dev, ecpf_vport_exists);
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}
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#define MLX5_HOST_PF_MAX_VFS (127u)
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static inline u16 mlx5_core_max_vfs(struct mlx5_core_dev *dev)
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{
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@ -631,7 +631,8 @@ struct mlx5_ifc_e_switch_cap_bits {
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u8 vport_svlan_insert[0x1];
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u8 vport_cvlan_insert_if_not_exist[0x1];
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u8 vport_cvlan_insert_overwrite[0x1];
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u8 reserved_at_5[0x17];
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u8 reserved_at_5[0x16];
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u8 ecpf_vport_exists[0x1];
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u8 counter_eswitch_affinity[0x1];
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u8 merged_eswitch[0x1];
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u8 nic_vport_node_guid_modify[0x1];
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@ -38,11 +38,13 @@
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#define MLX5_VPORT_PF_PLACEHOLDER (1u)
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#define MLX5_VPORT_UPLINK_PLACEHOLDER (1u)
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#define MLX5_VPORT_ECPF_PLACEHOLDER(mdev) (mlx5_ecpf_vport_exists(mdev))
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#define MLX5_SPECIAL_VPORTS (MLX5_VPORT_PF_PLACEHOLDER + \
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MLX5_VPORT_UPLINK_PLACEHOLDER)
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#define MLX5_SPECIAL_VPORTS(mdev) (MLX5_VPORT_PF_PLACEHOLDER + \
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MLX5_VPORT_UPLINK_PLACEHOLDER + \
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MLX5_VPORT_ECPF_PLACEHOLDER(mdev))
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#define MLX5_TOTAL_VPORTS(mdev) (MLX5_SPECIAL_VPORTS + \
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#define MLX5_TOTAL_VPORTS(mdev) (MLX5_SPECIAL_VPORTS(mdev) + \
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mlx5_core_max_vfs(mdev))
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#define MLX5_VPORT_MANAGER(mdev) \
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