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sh: Consolidate struct sh_cpuinfo definitions across _32/_64 split.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -3,6 +3,7 @@
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#include <asm/cpu-features.h>
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#include <asm/segment.h>
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#include <asm/cache.h>
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#ifndef __ASSEMBLY__
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/*
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@ -43,8 +44,45 @@ enum cpu_type {
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CPU_SH_NONE
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};
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/*
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* TLB information structure
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*
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* Defined for both I and D tlb, per-processor.
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*/
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struct tlb_info {
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unsigned long long next;
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unsigned long long first;
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unsigned long long last;
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unsigned int entries;
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unsigned int step;
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unsigned long flags;
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};
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struct sh_cpuinfo {
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unsigned int type;
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int cut_major, cut_minor;
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unsigned long loops_per_jiffy;
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unsigned long asid_cache;
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struct cache_info icache; /* Primary I-cache */
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struct cache_info dcache; /* Primary D-cache */
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struct cache_info scache; /* Secondary cache */
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/* TLB info */
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struct tlb_info itlb;
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struct tlb_info dtlb;
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unsigned long flags;
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} __attribute__ ((aligned(L1_CACHE_BYTES)));
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extern struct sh_cpuinfo cpu_data[];
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#define boot_cpu_data cpu_data[0]
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#define current_cpu_data cpu_data[smp_processor_id()]
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#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
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/* Forward decl */
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struct sh_cpuinfo;
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struct seq_operations;
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extern struct pt_regs fake_swapper_regs;
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@ -13,7 +13,6 @@
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#include <linux/linkage.h>
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#include <asm/page.h>
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#include <asm/types.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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/*
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@ -27,24 +26,6 @@
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#define CCN_CVR 0xff000040
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#define CCN_PRR 0xff000044
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struct sh_cpuinfo {
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unsigned int type;
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int cut_major, cut_minor;
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unsigned long loops_per_jiffy;
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unsigned long asid_cache;
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struct cache_info icache; /* Primary I-cache */
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struct cache_info dcache; /* Primary D-cache */
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struct cache_info scache; /* Secondary cache */
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unsigned long flags;
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} __attribute__ ((aligned(L1_CACHE_BYTES)));
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extern struct sh_cpuinfo cpu_data[];
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#define boot_cpu_data cpu_data[0]
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#define current_cpu_data cpu_data[smp_processor_id()]
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#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
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asmlinkage void __init sh_cpu_init(void);
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/*
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@ -17,7 +17,6 @@
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#include <linux/compiler.h>
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#include <asm/page.h>
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#include <asm/types.h>
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#include <asm/cache.h>
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#include <asm/ptrace.h>
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#include <cpu/registers.h>
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@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \
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: "1" (__dummy)); \
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pc; })
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/*
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* TLB information structure
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*
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* Defined for both I and D tlb, per-processor.
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*/
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struct tlb_info {
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unsigned long long next;
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unsigned long long first;
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unsigned long long last;
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unsigned int entries;
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unsigned int step;
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unsigned long flags;
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};
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struct sh_cpuinfo {
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enum cpu_type type;
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unsigned long loops_per_jiffy;
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unsigned long asid_cache;
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unsigned int cpu_clock, master_clock, bus_clock, module_clock;
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/* Cache info */
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struct cache_info icache;
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struct cache_info dcache;
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struct cache_info scache;
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/* TLB info */
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struct tlb_info itlb;
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struct tlb_info dtlb;
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unsigned long flags;
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};
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extern struct sh_cpuinfo cpu_data[];
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#define boot_cpu_data cpu_data[0]
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#define current_cpu_data cpu_data[smp_processor_id()]
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#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
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#endif
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/*
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