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ASoC: SOF: Intel: hda: fix ordering bug in resume flow
When HDA controller is resumed from suspend, i915 HDMI/DP codec requires that following order of actions is kept: - i915 display power up and configuration of link params - hda link reset and setup Current SOF HDA code delegates display codec power control to the codec driver. This works most of the time, but in runtime PM sequences, the above constraint may be violated. On platforms where BIOS values for HDA link parameters do not match hardware reset defaults, this may lead to errors in HDA verb transactions after resume. Fix the issue by explicitly powering the display codec in the HDA controller resume/suspend calls, thus ensuring correct ordering. Special handling is needed for the D0i3 flow, where display power must be turned off even though DSP is left powered. Now that we have more invocations of the display power helper functions, the conditional checks surrounding each call have been moved inside hda_codec_i915_display_power(). The two special cases of display powering at initial probe are handled separately. The intent is to avoid powering the display whenever no display codecs are used. Note that early powering of display was removed in commit687ae9e287
("ASoC: intel: skl: Fix display power regression"). This change was also copied to the SOF driver. No failures have resulted as hardware default values for link parameters have worked out of the box. However with recent i915 driver changes like done in commit87c1694533
("drm/i915: save AUD_FREQ_CNTRL state at audio domain suspend"), this does not hold anymore and errors are hit. Cc: Takashi Iwai <tiwai@suse.de> Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20200206200223.7715-2-kai.vehmanen@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -174,8 +174,10 @@ void hda_codec_i915_display_power(struct snd_sof_dev *sdev, bool enable)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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dev_dbg(bus->dev, "Turning i915 HDAC power %d\n", enable);
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, enable);
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if (HDA_IDISP_CODEC(bus->codec_mask)) {
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dev_dbg(bus->dev, "Turning i915 HDAC power %d\n", enable);
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, enable);
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}
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}
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EXPORT_SYMBOL_NS(hda_codec_i915_display_power, SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
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@ -189,7 +191,8 @@ int hda_codec_i915_init(struct snd_sof_dev *sdev)
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if (ret < 0)
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return ret;
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hda_codec_i915_display_power(sdev, true);
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/* codec_mask not yet known, power up for probe */
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
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return 0;
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}
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@ -200,7 +203,8 @@ int hda_codec_i915_exit(struct snd_sof_dev *sdev)
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struct hdac_bus *bus = sof_to_bus(sdev);
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int ret;
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hda_codec_i915_display_power(sdev, false);
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/* power down unconditionally */
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
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ret = snd_hdac_i915_exit(bus);
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@ -428,6 +428,9 @@ static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend)
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return ret;
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}
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/* display codec can powered off after link reset */
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hda_codec_i915_display_power(sdev, false);
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return 0;
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}
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@ -439,6 +442,9 @@ static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume)
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#endif
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int ret;
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/* display codec must be powered before link reset */
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hda_codec_i915_display_power(sdev, true);
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/*
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* clear TCSEL to clear playback on some HD Audio
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* codecs. PCI TCSEL is defined in the Intel manuals.
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@ -482,6 +488,8 @@ int hda_dsp_resume(struct snd_sof_dev *sdev)
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struct pci_dev *pci = to_pci_dev(sdev->dev);
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if (sdev->s0_suspend) {
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hda_codec_i915_display_power(sdev, true);
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/* restore L1SEN bit */
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if (hda->l1_support_changed)
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
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@ -531,6 +539,9 @@ int hda_dsp_suspend(struct snd_sof_dev *sdev)
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int ret;
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if (sdev->s0_suspend) {
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/* we can't keep a wakeref to display driver at suspend */
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hda_codec_i915_display_power(sdev, false);
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/* enable L1SEN to make sure the system can enter S0Ix */
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hda->l1_support_changed =
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
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@ -381,7 +381,7 @@ static int hda_init_caps(struct snd_sof_dev *sdev)
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hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
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if (!HDA_IDISP_CODEC(bus->codec_mask))
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hda_codec_i915_display_power(sdev, false);
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hda_codec_i915_exit(sdev);
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/*
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* we are done probing so decrement link counts
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