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[SCSI] qla2xxx: Implemetation of mctp.
[jejb: fix up checkpatch errors] Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com> Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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7d613ac6ac
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@ -26,7 +26,7 @@ qla2x00_sysfs_read_fw_dump(struct file *filp, struct kobject *kobj,
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struct qla_hw_data *ha = vha->hw;
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int rval = 0;
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if (ha->fw_dump_reading == 0)
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if (!(ha->fw_dump_reading || ha->mctp_dump_reading))
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return 0;
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if (IS_QLA82XX(ha)) {
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@ -39,9 +39,14 @@ qla2x00_sysfs_read_fw_dump(struct file *filp, struct kobject *kobj,
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rval = memory_read_from_buffer(buf, count,
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&off, ha->md_dump, ha->md_dump_size);
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return rval;
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} else
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} else if (ha->mctp_dumped && ha->mctp_dump_reading)
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return memory_read_from_buffer(buf, count, &off, ha->mctp_dump,
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MCTP_DUMP_SIZE);
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else if (ha->fw_dump_reading)
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return memory_read_from_buffer(buf, count, &off, ha->fw_dump,
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ha->fw_dump_len);
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else
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return 0;
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}
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static ssize_t
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@ -107,6 +112,22 @@ qla2x00_sysfs_write_fw_dump(struct file *filp, struct kobject *kobj,
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if (IS_QLA82XX(ha))
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set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
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break;
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case 6:
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if (!ha->mctp_dump_reading)
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break;
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ql_log(ql_log_info, vha, 0x70c1,
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"MCTP dump cleared on (%ld).\n", vha->host_no);
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ha->mctp_dump_reading = 0;
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ha->mctp_dumped = 0;
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break;
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case 7:
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if (ha->mctp_dumped && !ha->mctp_dump_reading) {
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ha->mctp_dump_reading = 1;
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ql_log(ql_log_info, vha, 0x70c2,
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"Raw mctp dump ready for read on (%ld).\n",
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vha->host_no);
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}
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break;
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}
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return count;
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}
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@ -12,28 +12,30 @@
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* | Level | Last Value Used | Holes |
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* ----------------------------------------------------------------------
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* | Module Init and Probe | 0x0124 | 0x4b,0xba,0xfa |
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* | Mailbox commands | 0x114c | 0x111a-0x111b |
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* | Mailbox commands | 0x114f | 0x111a-0x111b |
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* | | | 0x112c-0x112e |
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* | | | 0x113a |
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* | Device Discovery | 0x2087 | 0x2020-0x2022 |
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* | Queue Command and IO tracing | 0x3030 | 0x3006,0x3008 |
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* | | | 0x302d-0x302e |
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* | DPC Thread | 0x401c | 0x4002,0x4013 |
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* | Async Events | 0x506c | 0x502b-0x502f |
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* | Async Events | 0x5071 | 0x502b-0x502f |
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* | | | 0x5047,0x5052 |
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* | Timer Routines | 0x6011 | |
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* | User Space Interactions | 0x70bd | 0x7018,0x702e, |
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* | User Space Interactions | 0x70c2 | 0x7018,0x702e, |
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* | | | 0x7039,0x7045, |
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* | | | 0x7073-0x7075, |
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* | | | 0x708c, |
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* | | | 0x70a5,0x70a6, |
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* | | | 0x70a8,0x70ab, |
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* | | | 0x70ad-0x70ae |
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* | | | 0x70be-70c0 |
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* | Task Management | 0x803c | 0x8025-0x8026 |
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* | | | 0x800b,0x8039 |
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* | AER/EEH | 0x9011 | |
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* | Virtual Port | 0xa007 | |
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* | ISP82XX Specific | 0xb080 | 0xb024 |
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* | ISP82XX Specific | 0xb084 | 0xb002 |
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* | | | 0xb082,0xb083 |
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* | MultiQ | 0xc00c | |
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* | Misc | 0xd010 | |
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* | Target Mode | 0xe06f | |
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@ -2765,6 +2765,9 @@ struct qla_hw_data {
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#define IS_CT6_SUPPORTED(ha) ((ha)->device_type & DT_CT6_SUPPORTED)
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#define IS_MQUE_CAPABLE(ha) ((ha)->mqenable || IS_QLA83XX(ha))
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#define IS_BIDI_CAPABLE(ha) ((IS_QLA25XX(ha) || IS_QLA2031(ha)))
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/* Bit 21 of fw_attributes decides the MCTP capabilities */
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#define IS_MCTP_CAPABLE(ha) (IS_QLA2031(ha) && \
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((ha)->fw_attributes_ext[0] & BIT_0))
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/* HBA serial number */
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uint8_t serial0;
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@ -2880,7 +2883,12 @@ struct qla_hw_data {
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int fw_dump_reading;
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dma_addr_t eft_dma;
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void *eft;
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/* Current size of mctp dump is 0x086064 bytes */
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#define MCTP_DUMP_SIZE 0x086064
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dma_addr_t mctp_dump_dma;
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void *mctp_dump;
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int mctp_dumped;
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int mctp_dump_reading;
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uint32_t chain_offset;
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struct dentry *dfs_dir;
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struct dentry *dfs_fce;
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@ -82,6 +82,7 @@ extern int __qla83xx_get_idc_control(scsi_qla_host_t *, uint32_t *);
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extern void qla83xx_idc_audit(scsi_qla_host_t *, int);
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extern int qla83xx_nic_core_reset(scsi_qla_host_t *);
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extern void qla83xx_reset_ownership(scsi_qla_host_t *);
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extern int qla2xxx_mctp_dump(scsi_qla_host_t *);
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/*
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* Global Data in qla_os.c source file.
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@ -399,6 +400,9 @@ qla81xx_set_port_config(scsi_qla_host_t *, uint16_t *);
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extern int
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qla2x00_port_logout(scsi_qla_host_t *, struct fc_port *);
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extern int
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qla2x00_dump_mctp_data(scsi_qla_host_t *, dma_addr_t, uint32_t, uint32_t);
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/*
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* Global Function Prototypes in qla_isr.c source file.
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*/
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@ -4110,6 +4110,60 @@ exit:
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return rval;
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}
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int
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qla2xxx_mctp_dump(scsi_qla_host_t *vha)
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{
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struct qla_hw_data *ha = vha->hw;
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int rval = QLA_FUNCTION_FAILED;
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if (!IS_MCTP_CAPABLE(ha)) {
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/* This message can be removed from the final version */
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ql_log(ql_log_info, vha, 0x506d,
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"This board is not MCTP capable\n");
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return rval;
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}
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if (!ha->mctp_dump) {
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ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
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MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
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if (!ha->mctp_dump) {
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ql_log(ql_log_warn, vha, 0x506e,
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"Failed to allocate memory for mctp dump\n");
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return rval;
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}
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}
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#define MCTP_DUMP_STR_ADDR 0x00000000
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rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
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MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
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if (rval != QLA_SUCCESS) {
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ql_log(ql_log_warn, vha, 0x506f,
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"Failed to capture mctp dump\n");
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} else {
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ql_log(ql_log_info, vha, 0x5070,
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"Mctp dump capture for host (%ld/%p).\n",
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vha->host_no, ha->mctp_dump);
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ha->mctp_dumped = 1;
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}
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if (!ha->flags.nic_core_reset_hdlr_active) {
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ha->flags.nic_core_reset_hdlr_active = 1;
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rval = qla83xx_restart_nic_firmware(vha);
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if (rval)
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/* NIC Core reset failed. */
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ql_log(ql_log_warn, vha, 0x5071,
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"Failed to restart nic firmware\n");
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else
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ql_dbg(ql_dbg_p3p, vha, 0xb084,
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"Restarted NIC firmware successfully.\n");
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ha->flags.nic_core_reset_hdlr_active = 0;
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}
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return rval;
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}
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/*
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* qla82xx_quiescent_state_cleanup
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* Description: This function will block the new I/Os
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@ -559,18 +559,16 @@ qla2x00_get_fw_version(scsi_qla_host_t *vha)
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ha->phy_version[1] = mcp->mb[9] >> 8;
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ha->phy_version[2] = mcp->mb[9] & 0xff;
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}
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if (IS_QLA83XX(ha)) {
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if (mcp->mb[6] & BIT_15) {
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if (IS_FWI2_CAPABLE(ha)) {
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ha->fw_attributes_h = mcp->mb[15];
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ha->fw_attributes_ext[0] = mcp->mb[16];
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ha->fw_attributes_ext[1] = mcp->mb[17];
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
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"%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
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__func__, mcp->mb[15], mcp->mb[6]);
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} else
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
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"%s: FwAttributes [Upper] invalid, MB6:%04x\n",
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__func__, mcp->mb[6]);
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"%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
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__func__, mcp->mb[17], mcp->mb[16]);
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}
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failed:
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@ -3408,7 +3406,6 @@ qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
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return rval;
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}
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/* 84XX Support **************************************************************/
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struct cs84xx_mgmt_cmd {
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@ -4950,3 +4947,50 @@ qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
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return rval;
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}
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int
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qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
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uint32_t size)
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{
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int rval;
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mbx_cmd_t mc;
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mbx_cmd_t *mcp = &mc;
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if (!IS_MCTP_CAPABLE(vha->hw))
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return QLA_FUNCTION_FAILED;
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
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"Entered %s.\n", __func__);
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mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
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mcp->mb[1] = LSW(addr);
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mcp->mb[2] = MSW(req_dma);
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mcp->mb[3] = LSW(req_dma);
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mcp->mb[4] = MSW(size);
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mcp->mb[5] = LSW(size);
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mcp->mb[6] = MSW(MSD(req_dma));
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mcp->mb[7] = LSW(MSD(req_dma));
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mcp->mb[8] = MSW(addr);
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/* Setting RAM ID to valid */
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mcp->mb[10] |= BIT_7;
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/* For MCTP RAM ID is 0x40 */
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mcp->mb[10] |= 0x40;
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mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
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MBX_0;
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mcp->in_mb = MBX_0;
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mcp->tov = MBX_TOV_SECONDS;
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mcp->flags = 0;
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rval = qla2x00_mailbox_command(vha, mcp);
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if (rval != QLA_SUCCESS) {
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ql_dbg(ql_dbg_mbx, vha, 0x114e,
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"Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
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} else {
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ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
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"Done %s.\n", __func__);
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}
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return rval;
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}
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@ -2404,20 +2404,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
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base_vha->vp_idx;
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if (IS_QLA8031(ha)) {
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sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
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ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
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INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
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sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
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ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
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INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
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INIT_WORK(&ha->idc_state_handler,
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qla83xx_idc_state_handler_work);
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INIT_WORK(&ha->nic_core_unrecoverable,
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qla83xx_nic_core_unrecoverable_work);
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}
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/* Set the SG table size based on ISP type */
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if (!IS_FWI2_CAPABLE(ha)) {
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if (IS_QLA2100(ha))
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@ -2558,6 +2544,20 @@ que_init:
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*/
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qla2xxx_wake_dpc(base_vha);
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if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
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sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
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ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
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INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
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sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
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ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
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INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
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INIT_WORK(&ha->idc_state_handler,
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qla83xx_idc_state_handler_work);
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INIT_WORK(&ha->nic_core_unrecoverable,
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qla83xx_nic_core_unrecoverable_work);
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}
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skip_dpc:
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list_add_tail(&base_vha->list, &ha->vp_list);
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base_vha->host->irq = ha->pdev->irq;
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@ -3331,6 +3331,10 @@ qla2x00_mem_free(struct qla_hw_data *ha)
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{
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qla2x00_free_fw_dump(ha);
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if (ha->mctp_dump)
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dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
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ha->mctp_dump_dma);
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if (ha->srb_mempool)
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mempool_destroy(ha->srb_mempool);
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@ -3860,6 +3864,13 @@ qla83xx_nic_core_reset_work(struct work_struct *work)
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scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
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uint32_t dev_state = 0;
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if (IS_QLA2031(ha)) {
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if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
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ql_log(ql_log_warn, base_vha, 0xb081,
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"Failed to dump mctp\n");
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return;
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}
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if (!ha->flags.nic_core_reset_hdlr_active) {
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if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
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qla83xx_idc_lock(base_vha, 0);
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