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ARM: STi: DT: Add STiH407 family mtsin0 pinctrl configuration
mtsin0 channel can only be configured for parallel data transfer. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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@ -608,6 +608,25 @@
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};
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mtsin0 {
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pinctrl_mtsin0_parallel: mtsin0_parallel {
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st,pins {
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DATA7 = <&pio10 4 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA6 = <&pio10 5 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA5 = <&pio10 6 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA4 = <&pio10 7 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA3 = <&pio11 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA2 = <&pio11 1 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA1 = <&pio11 2 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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DATA0 = <&pio11 3 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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CLKIN = <&pio10 3 ALT3 IN CLKNOTDATA 0 CLK_A>;
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VALID = <&pio10 1 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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ERROR = <&pio10 0 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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PKCLK = <&pio10 2 ALT3 IN SE_NICLK_IO 0 CLK_A>;
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};
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};
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};
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};
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pin-controller-front1 {
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