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https://github.com/torvalds/linux.git
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Merge branch 'mvebu/soc-orion5x' into next/dt
Merging in a local copy from the next/soc branch to avoid some annoying context conflicts in the dts Makefile. * mvebu/soc-orion5x: (29 commits) ARM: orion: remove no longer needed gpio DT code ARM: orion: remove no longer needed DT IRQ code ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree ARM: orion5x: convert d2net to Device Tree ARM: orion5x: convert RD-88F5182 to Device Tree ARM: orion5x: remove unneeded code for edmini_v2 ARM: orion5x: keep TODO list in edmini_v2 DT ARM: orion5x: use DT to describe NOR on edmini_v2 ARM: orion5x: use DT to describe EHCI on edmini_v2 ARM: orion5x: use DT to describe I2C devices on edmini_v2 ARM: orion5x: convert edmini_v2 to DT pinctrl ARM: orion5x: add standard pinctrl configs for sata0 and sata1 ARM: orion5x: add Device Bus description at SoC level ARM: orion5x: update I2C description at SoC level ARM: orion5x: enable pinctrl driver at SoC level ARM: orion5x: switch to DT interrupts and timer ARM: orion: switch to a per-platform handle_irq() function ARM: orion5x: convert to use 'clocks' property for UART controllers ARM: orion5x: switch to use the clock driver for DT platforms ARM: orion5x: add interrupt for Ethernet in Device Tree ...
This commit is contained in:
Olof Johansson
commit
805e55d568
@ -298,7 +298,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
|
|||||||
am43x-epos-evm.dtb \
|
am43x-epos-evm.dtb \
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||||||
am437x-gp-evm.dtb \
|
am437x-gp-evm.dtb \
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||||||
dra7-evm.dtb
|
dra7-evm.dtb
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||||||
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
|
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \
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||||||
|
orion5x-lacie-ethernet-disk-mini-v2.dtb \
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||||||
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orion5x-maxtor-shared-storage-2.dtb \
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||||||
|
orion5x-rd88f5182-nas.dtb
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||||||
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
|
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
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||||||
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
|
dtb-$(CONFIG_ARCH_QCOM) += qcom-msm8660-surf.dtb \
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||||||
qcom-msm8960-cdp.dtb \
|
qcom-msm8960-cdp.dtb \
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||||||
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|||||||
236
arch/arm/boot/dts/orion5x-lacie-d2-network.dts
Normal file
236
arch/arm/boot/dts/orion5x-lacie-d2-network.dts
Normal file
@ -0,0 +1,236 @@
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|||||||
|
/*
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||||||
|
* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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* Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
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|
*
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||||||
|
* This file is licensed under the terms of the GNU General Public
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||||||
|
* License version 2. This program is licensed "as is" without any
|
||||||
|
* warranty of any kind, whether express or implied.
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||||||
|
*/
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||||||
|
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||||||
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/dts-v1/;
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||||||
|
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|
#include <dt-bindings/gpio/gpio.h>
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|
#include <dt-bindings/input/input.h>
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|
#include <dt-bindings/interrupt-controller/irq.h>
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#include "orion5x-mv88f5182.dtsi"
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|
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/ {
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model = "LaCie d2 Network";
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compatible = "lacie,d2-network", "marvell,orion5x-88f5182", "marvell,orion5x";
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|
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||||||
|
memory {
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|
reg = <0x00000000 0x4000000>; /* 64 MB */
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||||||
|
};
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||||||
|
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||||||
|
chosen {
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|
bootargs = "console=ttyS0,115200n8 earlyprintk";
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|
linux,stdout-path = &uart0;
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||||||
|
};
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||||||
|
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||||||
|
soc {
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|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
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||||||
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<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
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<MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
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||||||
|
};
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||||||
|
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||||||
|
gpio-keys {
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|
compatible = "gpio-keys";
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|
pinctrl-0 = <&pmx_buttons>;
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||||||
|
pinctrl-names = "default";
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||||||
|
#address-cells = <1>;
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||||||
|
#size-cells = <0>;
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||||||
|
front_button {
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||||||
|
label = "Front Push Button";
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||||||
|
linux,code = <KEY_POWER>;
|
||||||
|
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
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||||||
|
};
|
||||||
|
|
||||||
|
power_rocker_sw_on {
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||||||
|
label = "Power rocker switch (on|auto)";
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||||||
|
linux,input-type = <5>; /* EV_SW */
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||||||
|
linux,code = <1>; /* D2NET_SWITCH_POWER_ON */
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||||||
|
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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||||||
|
};
|
||||||
|
|
||||||
|
power_rocker_sw_off {
|
||||||
|
label = "Power rocker switch (auto|off)";
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||||||
|
linux,input-type = <5>; /* EV_SW */
|
||||||
|
linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */
|
||||||
|
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
regulators {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
pinctrl-0 = <&pmx_sata0_power &pmx_sata1_power>;
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||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
sata0_power: regulator@0 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
reg = <0>;
|
||||||
|
regulator-name = "SATA0 Power";
|
||||||
|
regulator-min-microvolt = <5000000>;
|
||||||
|
regulator-max-microvolt = <5000000>;
|
||||||
|
enable-active-high;
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-boot-on;
|
||||||
|
gpio = <&gpio0 3 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sata1_power: regulator@1 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
reg = <1>;
|
||||||
|
regulator-name = "SATA1 Power";
|
||||||
|
regulator-min-microvolt = <5000000>;
|
||||||
|
regulator-max-microvolt = <5000000>;
|
||||||
|
enable-active-high;
|
||||||
|
regulator-always-on;
|
||||||
|
regulator-boot-on;
|
||||||
|
gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&devbus_bootcs {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
devbus,keep-config;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Currently the MTD code does not recognize the MX29LV400CBCT
|
||||||
|
* as a bottom-type device. This could cause risks of
|
||||||
|
* accidentally erasing critical flash sectors. We thus define
|
||||||
|
* a single, write-protected partition covering the whole
|
||||||
|
* flash. TODO: once the flash part TOP/BOTTOM detection
|
||||||
|
* issue is sorted out in the MTD code, break this into at
|
||||||
|
* least three partitions: 'u-boot code', 'u-boot environment'
|
||||||
|
* and 'whatever is left'.
|
||||||
|
*/
|
||||||
|
flash@0 {
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0 0x80000>;
|
||||||
|
bank-width = <1>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
label = "Full512Kb";
|
||||||
|
reg = <0 0x80000>;
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mdio {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethphy: ethernet-phy {
|
||||||
|
reg = <8>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
ð {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethernet-port@0 {
|
||||||
|
phy-handle = <ðphy>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
|
||||||
|
rtc@32 {
|
||||||
|
compatible = "ricoh,rs5c372b";
|
||||||
|
reg = <0x32>;
|
||||||
|
};
|
||||||
|
|
||||||
|
fan@3e {
|
||||||
|
compatible = "gmt,g762";
|
||||||
|
reg = <0x3e>;
|
||||||
|
|
||||||
|
/* Not enough HW info */
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
eeprom@50 {
|
||||||
|
compatible = "atmel,24c08";
|
||||||
|
reg = <0x50>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
pinctrl-0 = <&pmx_leds &pmx_board_id &pmx_fan_fail>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
pmx_board_id: pmx-board-id {
|
||||||
|
marvell,pins = "mpp0", "mpp1", "mpp2";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_buttons: pmx-buttons {
|
||||||
|
marvell,pins = "mpp8", "mpp9", "mpp18";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_fan_fail: pmx-fan-fail {
|
||||||
|
marvell,pins = "mpp5";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MPP6: Red front LED
|
||||||
|
* MPP16: Blue front LED blink control
|
||||||
|
*/
|
||||||
|
pmx_leds: pmx-leds {
|
||||||
|
marvell,pins = "mpp6", "mpp16";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata0_led_active: pmx-sata0-led-active {
|
||||||
|
marvell,pins = "mpp14";
|
||||||
|
marvell,function = "sata0";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata0_power: pmx-sata0-power {
|
||||||
|
marvell,pins = "mpp3";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata1_led_active: pmx-sata1-led-active {
|
||||||
|
marvell,pins = "mpp15";
|
||||||
|
marvell,function = "sata1";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata1_power: pmx-sata1-power {
|
||||||
|
marvell,pins = "mpp12";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Non MPP GPIOs:
|
||||||
|
* GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
|
||||||
|
* GPIO 23: Blue front LED off
|
||||||
|
* GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
|
||||||
|
*/
|
||||||
|
};
|
||||||
|
|
||||||
|
&sata {
|
||||||
|
pinctrl-0 = <&pmx_sata0_led_active
|
||||||
|
&pmx_sata1_led_active>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
status = "okay";
|
||||||
|
nr-ports = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
@ -6,8 +6,19 @@
|
|||||||
* warranty of any kind, whether express or implied.
|
* warranty of any kind, whether express or implied.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* TODO: add Orion USB device port init when kernel.org support is added.
|
||||||
|
* TODO: add flash write support: see below.
|
||||||
|
* TODO: add power-off support.
|
||||||
|
* TODO: add I2C EEPROM support.
|
||||||
|
*/
|
||||||
|
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
/include/ "orion5x.dtsi"
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
#include <dt-bindings/input/input.h>
|
||||||
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
|
#include "orion5x-mv88f5182.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "LaCie Ethernet Disk mini V2";
|
model = "LaCie Ethernet Disk mini V2";
|
||||||
@ -19,41 +30,105 @@
|
|||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "console=ttyS0,115200n8 earlyprintk";
|
bootargs = "console=ttyS0,115200n8 earlyprintk";
|
||||||
|
linux,stdout-path = &uart0;
|
||||||
};
|
};
|
||||||
|
|
||||||
ocp@f1000000 {
|
soc {
|
||||||
serial@12000 {
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
|
||||||
clock-frequency = <166666667>;
|
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
|
||||||
status = "okay";
|
<MBUS_ID(0x01, 0x0f) 0 0xfff80000 0x80000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
sata@80000 {
|
gpio-keys {
|
||||||
status = "okay";
|
|
||||||
nr-ports = <2>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
gpio_keys {
|
|
||||||
compatible = "gpio-keys";
|
compatible = "gpio-keys";
|
||||||
|
pinctrl-0 = <&pmx_power_button>;
|
||||||
|
pinctrl-names = "default";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
button@1 {
|
button@1 {
|
||||||
label = "Power-on Switch";
|
label = "Power-on Switch";
|
||||||
linux,code = <116>; /* KEY_POWER */
|
linux,code = <KEY_POWER>;
|
||||||
gpios = <&gpio0 18 0>;
|
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
gpio_leds {
|
gpio-leds {
|
||||||
compatible = "gpio-leds";
|
compatible = "gpio-leds";
|
||||||
|
pinctrl-0 = <&pmx_power_led>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
led@1 {
|
led@1 {
|
||||||
label = "power:blue";
|
label = "power:blue";
|
||||||
gpios = <&gpio0 16 1>;
|
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&devbus_bootcs {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* Read parameters */
|
||||||
|
devbus,bus-width = <8>;
|
||||||
|
devbus,turn-off-ps = <90000>;
|
||||||
|
devbus,badr-skew-ps = <0>;
|
||||||
|
devbus,acc-first-ps = <186000>;
|
||||||
|
devbus,acc-next-ps = <186000>;
|
||||||
|
|
||||||
|
/* Write parameters */
|
||||||
|
devbus,wr-high-ps = <90000>;
|
||||||
|
devbus,wr-low-ps = <90000>;
|
||||||
|
devbus,ale-wr-ps = <90000>;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Currently the MTD code does not recognize the MX29LV400CBCT
|
||||||
|
* as a bottom-type device. This could cause risks of
|
||||||
|
* accidentally erasing critical flash sectors. We thus define
|
||||||
|
* a single, write-protected partition covering the whole
|
||||||
|
* flash. TODO: once the flash part TOP/BOTTOM detection
|
||||||
|
* issue is sorted out in the MTD code, break this into at
|
||||||
|
* least three partitions: 'u-boot code', 'u-boot environment'
|
||||||
|
* and 'whatever is left'.
|
||||||
|
*/
|
||||||
|
flash@0 {
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0 0x80000>;
|
||||||
|
bank-width = <1>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
label = "Full512Kb";
|
||||||
|
reg = <0 0x80000>;
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
ð {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethernet-port@0 {
|
||||||
|
phy-handle = <ðphy>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
|
||||||
|
rtc@32 {
|
||||||
|
compatible = "ricoh,rs5c372a";
|
||||||
|
reg = <0x32>;
|
||||||
|
interrupt-parent = <&gpio0>;
|
||||||
|
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&mdio {
|
&mdio {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
@ -62,10 +137,38 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
ð {
|
&pinctrl {
|
||||||
status = "okay";
|
pinctrl-0 = <&pmx_rtc &pmx_power_led_ctrl>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
ethernet-port@0 {
|
pmx_power_button: pmx-power-button {
|
||||||
phy-handle = <ðphy>;
|
marvell,pins = "mpp18";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_power_led: pmx-power-led {
|
||||||
|
marvell,pins = "mpp16";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_power_led_ctrl: pmx-power-led-ctrl {
|
||||||
|
marvell,pins = "mpp17";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_rtc: pmx-rtc {
|
||||||
|
marvell,pins = "mpp3";
|
||||||
|
marvell,function = "gpio";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&sata {
|
||||||
|
pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
status = "okay";
|
||||||
|
nr-ports = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|||||||
178
arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
Normal file
178
arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dts
Normal file
@ -0,0 +1,178 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||||
|
* Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public
|
||||||
|
* License version 2. This program is licensed "as is" without any
|
||||||
|
* warranty of any kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
#include <dt-bindings/input/input.h>
|
||||||
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
|
#include "orion5x-mv88f5182.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Maxtor Shared Storage II";
|
||||||
|
compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x00000000 0x4000000>; /* 64 MB */
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "console=ttyS0,115200n8 earlyprintk";
|
||||||
|
linux,stdout-path = &uart0;
|
||||||
|
};
|
||||||
|
|
||||||
|
soc {
|
||||||
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
|
||||||
|
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
|
||||||
|
<MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio-keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
pinctrl-0 = <&pmx_buttons>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
power {
|
||||||
|
label = "Power";
|
||||||
|
linux,code = <KEY_POWER>;
|
||||||
|
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
|
||||||
|
reset {
|
||||||
|
label = "Reset";
|
||||||
|
linux,code = <KEY_RESTART>;
|
||||||
|
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&devbus_bootcs {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
devbus,keep-config;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Currently the MTD code does not recognize the MX29LV400CBCT
|
||||||
|
* as a bottom-type device. This could cause risks of
|
||||||
|
* accidentally erasing critical flash sectors. We thus define
|
||||||
|
* a single, write-protected partition covering the whole
|
||||||
|
* flash. TODO: once the flash part TOP/BOTTOM detection
|
||||||
|
* issue is sorted out in the MTD code, break this into at
|
||||||
|
* least three partitions: 'u-boot code', 'u-boot environment'
|
||||||
|
* and 'whatever is left'.
|
||||||
|
*/
|
||||||
|
flash@0 {
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0 0x40000>;
|
||||||
|
bank-width = <1>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mdio {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethphy: ethernet-phy {
|
||||||
|
reg = <8>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
ð {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethernet-port@0 {
|
||||||
|
phy-handle = <ðphy>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
|
||||||
|
rtc@68 {
|
||||||
|
compatible = "st,m41t81";
|
||||||
|
reg = <0x68>;
|
||||||
|
pinctrl-0 = <&pmx_rtc>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
interrupt-parent = <&gpio0>;
|
||||||
|
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
pinctrl-0 = <&pmx_leds &pmx_misc>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
pmx_buttons: pmx-buttons {
|
||||||
|
marvell,pins = "mpp11", "mpp12";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MPP0: Power LED
|
||||||
|
* MPP1: Error LED
|
||||||
|
*/
|
||||||
|
pmx_leds: pmx-leds {
|
||||||
|
marvell,pins = "mpp0", "mpp1";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MPP4: HDD ind. (Single/Dual)
|
||||||
|
* MPP5: HD0 5V control
|
||||||
|
* MPP6: HD0 12V control
|
||||||
|
* MPP7: HD1 5V control
|
||||||
|
* MPP8: HD1 12V control
|
||||||
|
*/
|
||||||
|
pmx_misc: pmx-misc {
|
||||||
|
marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_rtc: pmx-rtc {
|
||||||
|
marvell,pins = "mpp3";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata0_led_active: pmx-sata0-led-active {
|
||||||
|
marvell,pins = "mpp14";
|
||||||
|
marvell,function = "sata0";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata1_led_active: pmx-sata1-led-active {
|
||||||
|
marvell,pins = "mpp15";
|
||||||
|
marvell,function = "sata1";
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Non MPP GPIOs:
|
||||||
|
* GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
|
||||||
|
* GPIO 23: Blue front LED off
|
||||||
|
* GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
|
||||||
|
*/
|
||||||
|
};
|
||||||
|
|
||||||
|
&sata {
|
||||||
|
pinctrl-0 = <&pmx_sata0_led_active
|
||||||
|
&pmx_sata1_led_active>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
status = "okay";
|
||||||
|
nr-ports = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
45
arch/arm/boot/dts/orion5x-mv88f5182.dtsi
Normal file
45
arch/arm/boot/dts/orion5x-mv88f5182.dtsi
Normal file
@ -0,0 +1,45 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public
|
||||||
|
* License version 2. This program is licensed "as is" without any
|
||||||
|
* warranty of any kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "orion5x.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
compatible = "marvell,orion5x-88f5182", "marvell,orion5x";
|
||||||
|
|
||||||
|
soc {
|
||||||
|
compatible = "marvell,orion5x-88f5182-mbus", "simple-bus";
|
||||||
|
|
||||||
|
internal-regs {
|
||||||
|
pinctrl: pinctrl@10000 {
|
||||||
|
compatible = "marvell,88f5182-pinctrl";
|
||||||
|
reg = <0x10000 0x8>, <0x10050 0x4>;
|
||||||
|
|
||||||
|
pmx_sata0: pmx-sata0 {
|
||||||
|
marvell,pins = "mpp12", "mpp14";
|
||||||
|
marvell,function = "sata0";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_sata1: pmx-sata1 {
|
||||||
|
marvell,pins = "mpp13", "mpp15";
|
||||||
|
marvell,function = "sata1";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
core_clk: core-clocks@10030 {
|
||||||
|
compatible = "marvell,mv88f5182-core-clock";
|
||||||
|
reg = <0x10010 0x4>;
|
||||||
|
#clock-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
mbusc: mbus-controller@20000 {
|
||||||
|
compatible = "marvell,mbus-controller";
|
||||||
|
reg = <0x20000 0x100>, <0x1500 0x20>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
177
arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
Normal file
177
arch/arm/boot/dts/orion5x-rd88f5182-nas.dts
Normal file
@ -0,0 +1,177 @@
|
|||||||
|
/*
|
||||||
|
* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public
|
||||||
|
* License version 2. This program is licensed "as is" without any
|
||||||
|
* warranty of any kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
#include "orion5x-mv88f5182.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Marvell Reference Design 88F5182 NAS";
|
||||||
|
compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x00000000 0x4000000>; /* 64 MB */
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "console=ttyS0,115200n8 earlyprintk";
|
||||||
|
linux,stdout-path = &uart0;
|
||||||
|
};
|
||||||
|
|
||||||
|
soc {
|
||||||
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
|
||||||
|
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
|
||||||
|
<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>,
|
||||||
|
<MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
gpio-leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
pinctrl-0 = <&pmx_debug_led>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
led@0 {
|
||||||
|
label = "rd88f5182:cpu";
|
||||||
|
linux,default-trigger = "heartbeat";
|
||||||
|
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&devbus_bootcs {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* Read parameters */
|
||||||
|
devbus,bus-width = <8>;
|
||||||
|
devbus,turn-off-ps = <90000>;
|
||||||
|
devbus,badr-skew-ps = <0>;
|
||||||
|
devbus,acc-first-ps = <186000>;
|
||||||
|
devbus,acc-next-ps = <186000>;
|
||||||
|
|
||||||
|
/* Write parameters */
|
||||||
|
devbus,wr-high-ps = <90000>;
|
||||||
|
devbus,wr-low-ps = <90000>;
|
||||||
|
devbus,ale-wr-ps = <90000>;
|
||||||
|
|
||||||
|
flash@0 {
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0 0x80000>;
|
||||||
|
bank-width = <1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&devbus_cs1 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
/* Read parameters */
|
||||||
|
devbus,bus-width = <8>;
|
||||||
|
devbus,turn-off-ps = <90000>;
|
||||||
|
devbus,badr-skew-ps = <0>;
|
||||||
|
devbus,acc-first-ps = <186000>;
|
||||||
|
devbus,acc-next-ps = <186000>;
|
||||||
|
|
||||||
|
/* Write parameters */
|
||||||
|
devbus,wr-high-ps = <90000>;
|
||||||
|
devbus,wr-low-ps = <90000>;
|
||||||
|
devbus,ale-wr-ps = <90000>;
|
||||||
|
|
||||||
|
flash@0 {
|
||||||
|
compatible = "cfi-flash";
|
||||||
|
reg = <0 0x1000000>;
|
||||||
|
bank-width = <1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
ð {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethernet-port@0 {
|
||||||
|
phy-handle = <ðphy>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
|
||||||
|
rtc@68 {
|
||||||
|
pinctrl-0 = <&pmx_rtc>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
compatible = "dallas,ds1338";
|
||||||
|
reg = <0x68>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mdio {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ethphy: ethernet-phy {
|
||||||
|
reg = <8>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&pinctrl {
|
||||||
|
pinctrl-0 = <&pmx_reset_switch &pmx_misc_gpios
|
||||||
|
&pmx_pci_gpios>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
/*
|
||||||
|
* MPP[20] PCI Clock to MV88F5182
|
||||||
|
* MPP[21] PCI Clock to mini PCI CON11
|
||||||
|
* MPP[22] USB 0 over current indication
|
||||||
|
* MPP[23] USB 1 over current indication
|
||||||
|
* MPP[24] USB 1 over current enable
|
||||||
|
* MPP[25] USB 0 over current enable
|
||||||
|
*/
|
||||||
|
|
||||||
|
pmx_debug_led: pmx-debug_led {
|
||||||
|
marvell,pins = "mpp0";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_reset_switch: pmx-reset-switch {
|
||||||
|
marvell,pins = "mpp1";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_rtc: pmx-rtc {
|
||||||
|
marvell,pins = "mpp3";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_misc_gpios: pmx-misc-gpios {
|
||||||
|
marvell,pins = "mpp4", "mpp5";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
|
||||||
|
pmx_pci_gpios: pmx-pci-gpios {
|
||||||
|
marvell,pins = "mpp6", "mpp7";
|
||||||
|
marvell,function = "gpio";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&sata {
|
||||||
|
pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
status = "okay";
|
||||||
|
nr-ports = <2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
@ -6,7 +6,9 @@
|
|||||||
* warranty of any kind, whether express or implied.
|
* warranty of any kind, whether express or implied.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/include/ "skeleton.dtsi"
|
#include "skeleton.dtsi"
|
||||||
|
|
||||||
|
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "Marvell Orion5x SoC";
|
model = "Marvell Orion5x SoC";
|
||||||
@ -17,19 +19,56 @@
|
|||||||
gpio0 = &gpio0;
|
gpio0 = &gpio0;
|
||||||
};
|
};
|
||||||
|
|
||||||
intc: interrupt-controller {
|
soc {
|
||||||
compatible = "marvell,orion-intc";
|
#address-cells = <2>;
|
||||||
interrupt-controller;
|
#size-cells = <1>;
|
||||||
#interrupt-cells = <1>;
|
controller = <&mbusc>;
|
||||||
reg = <0xf1020200 0x08>;
|
|
||||||
};
|
|
||||||
|
|
||||||
ocp@f1000000 {
|
devbus_bootcs: devbus-bootcs {
|
||||||
compatible = "simple-bus";
|
compatible = "marvell,orion-devbus";
|
||||||
ranges = <0x00000000 0xf1000000 0x4000000
|
reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>;
|
||||||
0xf2200000 0xf2200000 0x0000800>;
|
ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
|
clocks = <&core_clk 0>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
devbus_cs0: devbus-cs0 {
|
||||||
|
compatible = "marvell,orion-devbus";
|
||||||
|
reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>;
|
||||||
|
ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
clocks = <&core_clk 0>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
devbus_cs1: devbus-cs1 {
|
||||||
|
compatible = "marvell,orion-devbus";
|
||||||
|
reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>;
|
||||||
|
ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
clocks = <&core_clk 0>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
devbus_cs2: devbus-cs2 {
|
||||||
|
compatible = "marvell,orion-devbus";
|
||||||
|
reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>;
|
||||||
|
ranges = <0 MBUS_ID(0x01, 0x1b) 0 0xffffffff>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
clocks = <&core_clk 0>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
internal-regs {
|
||||||
|
compatible = "simple-bus";
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
|
||||||
|
|
||||||
gpio0: gpio@10100 {
|
gpio0: gpio@10100 {
|
||||||
compatible = "marvell,orion-gpio";
|
compatible = "marvell,orion-gpio";
|
||||||
@ -42,7 +81,7 @@
|
|||||||
interrupts = <6>, <7>, <8>, <9>;
|
interrupts = <6>, <7>, <8>, <9>;
|
||||||
};
|
};
|
||||||
|
|
||||||
spi@10600 {
|
spi: spi@10600 {
|
||||||
compatible = "marvell,orion-spi";
|
compatible = "marvell,orion-spi";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
@ -51,48 +90,74 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c@11000 {
|
i2c: i2c@11000 {
|
||||||
compatible = "marvell,mv64xxx-i2c";
|
compatible = "marvell,mv64xxx-i2c";
|
||||||
reg = <0x11000 0x20>;
|
reg = <0x11000 0x20>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
interrupts = <5>;
|
interrupts = <5>;
|
||||||
clock-frequency = <100000>;
|
clocks = <&core_clk 0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@12000 {
|
uart0: serial@12000 {
|
||||||
compatible = "ns16550a";
|
compatible = "ns16550a";
|
||||||
reg = <0x12000 0x100>;
|
reg = <0x12000 0x100>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = <3>;
|
interrupts = <3>;
|
||||||
/* set clock-frequency in board dts */
|
clocks = <&core_clk 0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@12100 {
|
uart1: serial@12100 {
|
||||||
compatible = "ns16550a";
|
compatible = "ns16550a";
|
||||||
reg = <0x12100 0x100>;
|
reg = <0x12100 0x100>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
interrupts = <4>;
|
interrupts = <4>;
|
||||||
/* set clock-frequency in board dts */
|
clocks = <&core_clk 0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
wdt@20300 {
|
bridge_intc: bridge-interrupt-ctrl@20110 {
|
||||||
|
compatible = "marvell,orion-bridge-intc";
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
reg = <0x20110 0x8>;
|
||||||
|
interrupts = <0>;
|
||||||
|
marvell,#interrupts = <4>;
|
||||||
|
};
|
||||||
|
|
||||||
|
intc: interrupt-controller@20200 {
|
||||||
|
compatible = "marvell,orion-intc";
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <1>;
|
||||||
|
reg = <0x20200 0x08>;
|
||||||
|
};
|
||||||
|
|
||||||
|
timer: timer@20300 {
|
||||||
|
compatible = "marvell,orion-timer";
|
||||||
|
reg = <0x20300 0x20>;
|
||||||
|
interrupt-parent = <&bridge_intc>;
|
||||||
|
interrupts = <1>, <2>;
|
||||||
|
clocks = <&core_clk 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
wdt: wdt@20300 {
|
||||||
compatible = "marvell,orion-wdt";
|
compatible = "marvell,orion-wdt";
|
||||||
reg = <0x20300 0x28>;
|
reg = <0x20300 0x28>;
|
||||||
|
interrupt-parent = <&bridge_intc>;
|
||||||
|
interrupts = <3>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
ehci@50000 {
|
ehci0: ehci@50000 {
|
||||||
compatible = "marvell,orion-ehci";
|
compatible = "marvell,orion-ehci";
|
||||||
reg = <0x50000 0x1000>;
|
reg = <0x50000 0x1000>;
|
||||||
interrupts = <17>;
|
interrupts = <17>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
xor@60900 {
|
xor: dma-controller@60900 {
|
||||||
compatible = "marvell,orion-xor";
|
compatible = "marvell,orion-xor";
|
||||||
reg = <0x60900 0x100
|
reg = <0x60900 0x100
|
||||||
0x60b00 0x100>;
|
0x60b00 0x100>;
|
||||||
@ -119,9 +184,10 @@
|
|||||||
marvell,tx-checksum-limit = <1600>;
|
marvell,tx-checksum-limit = <1600>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ethernet-port@0 {
|
ethport: ethernet-port@0 {
|
||||||
compatible = "marvell,orion-eth-port";
|
compatible = "marvell,orion-eth-port";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
|
interrupts = <21>;
|
||||||
/* overwrite MAC address in bootloader */
|
/* overwrite MAC address in bootloader */
|
||||||
local-mac-address = [00 00 00 00 00 00];
|
local-mac-address = [00 00 00 00 00 00];
|
||||||
/* set phy-handle property in board file */
|
/* set phy-handle property in board file */
|
||||||
@ -139,27 +205,28 @@
|
|||||||
/* add phy nodes in board file */
|
/* add phy nodes in board file */
|
||||||
};
|
};
|
||||||
|
|
||||||
sata@80000 {
|
sata: sata@80000 {
|
||||||
compatible = "marvell,orion-sata";
|
compatible = "marvell,orion-sata";
|
||||||
reg = <0x80000 0x5000>;
|
reg = <0x80000 0x5000>;
|
||||||
interrupts = <29>;
|
interrupts = <29>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
crypto@90000 {
|
ehci1: ehci@a0000 {
|
||||||
compatible = "marvell,orion-crypto";
|
|
||||||
reg = <0x90000 0x10000>,
|
|
||||||
<0xf2200000 0x800>;
|
|
||||||
reg-names = "regs", "sram";
|
|
||||||
interrupts = <28>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
ehci@a0000 {
|
|
||||||
compatible = "marvell,orion-ehci";
|
compatible = "marvell,orion-ehci";
|
||||||
reg = <0xa0000 0x1000>;
|
reg = <0xa0000 0x1000>;
|
||||||
interrupts = <12>;
|
interrupts = <12>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cesa: crypto@90000 {
|
||||||
|
compatible = "marvell,orion-crypto";
|
||||||
|
reg = <MBUS_ID(0xf0, 0x01) 0x90000 0x10000>,
|
||||||
|
<MBUS_ID(0x09, 0x00) 0x0 0x800>;
|
||||||
|
reg-names = "regs", "sram";
|
||||||
|
interrupts = <28>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|||||||
@ -108,6 +108,38 @@ static int __initdata gpio2_irqs[4] = {
|
|||||||
0,
|
0,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||||
|
/*
|
||||||
|
* Compiling with both non-DT and DT support enabled, will
|
||||||
|
* break asm irq handler used by non-DT boards. Therefore,
|
||||||
|
* we provide a C-style irq handler even for non-DT boards,
|
||||||
|
* if MULTI_IRQ_HANDLER is set.
|
||||||
|
*/
|
||||||
|
|
||||||
|
static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
|
||||||
|
|
||||||
|
static asmlinkage void
|
||||||
|
__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
|
||||||
|
{
|
||||||
|
u32 stat;
|
||||||
|
|
||||||
|
stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
|
||||||
|
stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
|
||||||
|
if (stat) {
|
||||||
|
unsigned int hwirq = __fls(stat);
|
||||||
|
handle_IRQ(hwirq, regs);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
|
||||||
|
stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
|
||||||
|
if (stat) {
|
||||||
|
unsigned int hwirq = 32 + __fls(stat);
|
||||||
|
handle_IRQ(hwirq, regs);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
void __init dove_init_irq(void)
|
void __init dove_init_irq(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
@ -115,6 +147,10 @@ void __init dove_init_irq(void)
|
|||||||
orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
|
orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
|
||||||
orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
|
orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
|
||||||
|
|
||||||
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||||
|
set_handle_irq(dove_legacy_handle_irq);
|
||||||
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initialize gpiolib for GPIOs 0-71.
|
* Initialize gpiolib for GPIOs 0-71.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -7,6 +7,7 @@
|
|||||||
* License version 2. This program is licensed "as is" without any
|
* License version 2. This program is licensed "as is" without any
|
||||||
* warranty of any kind, whether express or implied.
|
* warranty of any kind, whether express or implied.
|
||||||
*/
|
*/
|
||||||
|
#include <asm/exception.h>
|
||||||
#include <linux/gpio.h>
|
#include <linux/gpio.h>
|
||||||
#include <linux/kernel.h>
|
#include <linux/kernel.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
@ -30,11 +31,47 @@ static int __initdata gpio1_irqs[4] = {
|
|||||||
0,
|
0,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||||
|
/*
|
||||||
|
* Compiling with both non-DT and DT support enabled, will
|
||||||
|
* break asm irq handler used by non-DT boards. Therefore,
|
||||||
|
* we provide a C-style irq handler even for non-DT boards,
|
||||||
|
* if MULTI_IRQ_HANDLER is set.
|
||||||
|
*/
|
||||||
|
|
||||||
|
static void __iomem *kirkwood_irq_base = IRQ_VIRT_BASE;
|
||||||
|
|
||||||
|
asmlinkage void
|
||||||
|
__exception_irq_entry kirkwood_legacy_handle_irq(struct pt_regs *regs)
|
||||||
|
{
|
||||||
|
u32 stat;
|
||||||
|
|
||||||
|
stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_LOW_OFF);
|
||||||
|
stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_LOW_OFF);
|
||||||
|
if (stat) {
|
||||||
|
unsigned int hwirq = __fls(stat);
|
||||||
|
handle_IRQ(hwirq, regs);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
stat = readl_relaxed(kirkwood_irq_base + IRQ_CAUSE_HIGH_OFF);
|
||||||
|
stat &= readl_relaxed(kirkwood_irq_base + IRQ_MASK_HIGH_OFF);
|
||||||
|
if (stat) {
|
||||||
|
unsigned int hwirq = 32 + __fls(stat);
|
||||||
|
handle_IRQ(hwirq, regs);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
void __init kirkwood_init_irq(void)
|
void __init kirkwood_init_irq(void)
|
||||||
{
|
{
|
||||||
orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
|
orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
|
||||||
orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
|
orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
|
||||||
|
|
||||||
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||||
|
set_handle_irq(kirkwood_legacy_handle_irq);
|
||||||
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initialize gpiolib for GPIOs 0-49.
|
* Initialize gpiolib for GPIOs 0-49.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -5,6 +5,11 @@ menu "Orion Implementations"
|
|||||||
config ARCH_ORION5X_DT
|
config ARCH_ORION5X_DT
|
||||||
bool "Marvell Orion5x Flattened Device Tree"
|
bool "Marvell Orion5x Flattened Device Tree"
|
||||||
select USE_OF
|
select USE_OF
|
||||||
|
select ORION_CLK
|
||||||
|
select ORION_IRQCHIP
|
||||||
|
select ORION_TIMER
|
||||||
|
select PINCTRL
|
||||||
|
select PINCTRL_ORION
|
||||||
help
|
help
|
||||||
Say 'Y' here if you want your kernel to support the
|
Say 'Y' here if you want your kernel to support the
|
||||||
Marvell Orion5x using flattened device tree.
|
Marvell Orion5x using flattened device tree.
|
||||||
@ -23,6 +28,14 @@ config MACH_RD88F5182
|
|||||||
Say 'Y' here if you want your kernel to support the
|
Say 'Y' here if you want your kernel to support the
|
||||||
Marvell Orion-NAS (88F5182) RD2
|
Marvell Orion-NAS (88F5182) RD2
|
||||||
|
|
||||||
|
config MACH_RD88F5182_DT
|
||||||
|
bool "Marvell Orion-NAS Reference Design (Flattened Device Tree)"
|
||||||
|
select ARCH_ORION5X_DT
|
||||||
|
select I2C_BOARDINFO
|
||||||
|
help
|
||||||
|
Say 'Y' here if you want your kernel to support the Marvell
|
||||||
|
Orion-NAS (88F5182) RD2, Flattened Device Tree.
|
||||||
|
|
||||||
config MACH_KUROBOX_PRO
|
config MACH_KUROBOX_PRO
|
||||||
bool "KuroBox Pro"
|
bool "KuroBox Pro"
|
||||||
select I2C_BOARDINFO
|
select I2C_BOARDINFO
|
||||||
@ -102,28 +115,13 @@ config MACH_MV2120
|
|||||||
Say 'Y' here if you want your kernel to support the
|
Say 'Y' here if you want your kernel to support the
|
||||||
HP Media Vault mv2120 or mv5100.
|
HP Media Vault mv2120 or mv5100.
|
||||||
|
|
||||||
config MACH_EDMINI_V2_DT
|
config MACH_D2NET_DT
|
||||||
bool "LaCie Ethernet Disk mini V2 (Flattened Device Tree)"
|
bool "LaCie d2 Network / Big Disk Network (Flattened Device Tree)"
|
||||||
select I2C_BOARDINFO
|
|
||||||
select ARCH_ORION5X_DT
|
select ARCH_ORION5X_DT
|
||||||
help
|
|
||||||
Say 'Y' here if you want your kernel to support the
|
|
||||||
LaCie Ethernet Disk mini V2 (Flattened Device Tree).
|
|
||||||
|
|
||||||
config MACH_D2NET
|
|
||||||
bool "LaCie d2 Network"
|
|
||||||
select I2C_BOARDINFO
|
|
||||||
help
|
help
|
||||||
Say 'Y' here if you want your kernel to support the
|
Say 'Y' here if you want your kernel to support the
|
||||||
LaCie d2 Network NAS.
|
LaCie d2 Network NAS.
|
||||||
|
|
||||||
config MACH_BIGDISK
|
|
||||||
bool "LaCie Big Disk Network"
|
|
||||||
select I2C_BOARDINFO
|
|
||||||
help
|
|
||||||
Say 'Y' here if you want your kernel to support the
|
|
||||||
LaCie Big Disk Network NAS.
|
|
||||||
|
|
||||||
config MACH_NET2BIG
|
config MACH_NET2BIG
|
||||||
bool "LaCie 2Big Network"
|
bool "LaCie 2Big Network"
|
||||||
select I2C_BOARDINFO
|
select I2C_BOARDINFO
|
||||||
@ -131,8 +129,9 @@ config MACH_NET2BIG
|
|||||||
Say 'Y' here if you want your kernel to support the
|
Say 'Y' here if you want your kernel to support the
|
||||||
LaCie 2Big Network NAS.
|
LaCie 2Big Network NAS.
|
||||||
|
|
||||||
config MACH_MSS2
|
config MACH_MSS2_DT
|
||||||
bool "Maxtor Shared Storage II"
|
bool "Maxtor Shared Storage II (Flattened Device Tree)"
|
||||||
|
select ARCH_ORION5X_DT
|
||||||
help
|
help
|
||||||
Say 'Y' here if you want your kernel to support the
|
Say 'Y' here if you want your kernel to support the
|
||||||
Maxtor Shared Storage II platform.
|
Maxtor Shared Storage II platform.
|
||||||
|
|||||||
@ -12,10 +12,7 @@ obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o
|
|||||||
obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
|
obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
|
||||||
obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
|
obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
|
||||||
obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
|
obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
|
||||||
obj-$(CONFIG_MACH_D2NET) += d2net-setup.o
|
|
||||||
obj-$(CONFIG_MACH_BIGDISK) += d2net-setup.o
|
|
||||||
obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
|
obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o
|
||||||
obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
|
|
||||||
obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
|
obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
|
||||||
obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
|
obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
|
||||||
obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
|
obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
|
||||||
@ -23,4 +20,6 @@ obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
|
|||||||
obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
|
obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
|
||||||
|
|
||||||
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
|
obj-$(CONFIG_ARCH_ORION5X_DT) += board-dt.o
|
||||||
obj-$(CONFIG_MACH_EDMINI_V2_DT) += edmini_v2-setup.o
|
obj-$(CONFIG_MACH_D2NET_DT) += board-d2net.o
|
||||||
|
obj-$(CONFIG_MACH_MSS2_DT) += board-mss2.o
|
||||||
|
obj-$(CONFIG_MACH_RD88F5182_DT) += board-rd88f5182.o
|
||||||
|
|||||||
109
arch/arm/mach-orion5x/board-d2net.c
Normal file
109
arch/arm/mach-orion5x/board-d2net.c
Normal file
@ -0,0 +1,109 @@
|
|||||||
|
/*
|
||||||
|
* arch/arm/mach-orion5x/board-d2net.c
|
||||||
|
*
|
||||||
|
* LaCie d2Network and Big Disk Network NAS setup
|
||||||
|
*
|
||||||
|
* Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public
|
||||||
|
* License version 2. This program is licensed "as is" without any
|
||||||
|
* warranty of any kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/init.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/pci.h>
|
||||||
|
#include <linux/irq.h>
|
||||||
|
#include <linux/leds.h>
|
||||||
|
#include <linux/gpio.h>
|
||||||
|
#include <asm/mach-types.h>
|
||||||
|
#include <asm/mach/arch.h>
|
||||||
|
#include <asm/mach/pci.h>
|
||||||
|
#include <mach/orion5x.h>
|
||||||
|
#include <plat/orion-gpio.h>
|
||||||
|
#include "common.h"
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* LaCie d2 Network Info
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* GPIO LED's
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The blue front LED is wired to the CPLD and can blink in relation with the
|
||||||
|
* SATA activity.
|
||||||
|
*
|
||||||
|
* The following array detail the different LED registers and the combination
|
||||||
|
* of their possible values:
|
||||||
|
*
|
||||||
|
* led_off | blink_ctrl | SATA active | LED state
|
||||||
|
* | | |
|
||||||
|
* 1 | x | x | off
|
||||||
|
* 0 | 0 | 0 | off
|
||||||
|
* 0 | 1 | 0 | blink (rate 300ms)
|
||||||
|
* 0 | x | 1 | on
|
||||||
|
*
|
||||||
|
* Notes: The blue and the red front LED's can't be on at the same time.
|
||||||
|
* Red LED have priority.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define D2NET_GPIO_RED_LED 6
|
||||||
|
#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
|
||||||
|
#define D2NET_GPIO_BLUE_LED_OFF 23
|
||||||
|
|
||||||
|
static struct gpio_led d2net_leds[] = {
|
||||||
|
{
|
||||||
|
.name = "d2net:blue:sata",
|
||||||
|
.default_trigger = "default-on",
|
||||||
|
.gpio = D2NET_GPIO_BLUE_LED_OFF,
|
||||||
|
.active_low = 1,
|
||||||
|
},
|
||||||
|
{
|
||||||
|
.name = "d2net:red:fail",
|
||||||
|
.gpio = D2NET_GPIO_RED_LED,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct gpio_led_platform_data d2net_led_data = {
|
||||||
|
.num_leds = ARRAY_SIZE(d2net_leds),
|
||||||
|
.leds = d2net_leds,
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct platform_device d2net_gpio_leds = {
|
||||||
|
.name = "leds-gpio",
|
||||||
|
.id = -1,
|
||||||
|
.dev = {
|
||||||
|
.platform_data = &d2net_led_data,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static void __init d2net_gpio_leds_init(void)
|
||||||
|
{
|
||||||
|
int err;
|
||||||
|
|
||||||
|
/* Configure register blink_ctrl to allow SATA activity LED blinking. */
|
||||||
|
err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
|
||||||
|
if (err == 0) {
|
||||||
|
err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
|
||||||
|
if (err)
|
||||||
|
gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
|
||||||
|
}
|
||||||
|
if (err)
|
||||||
|
pr_err("d2net: failed to configure blue LED blink GPIO\n");
|
||||||
|
|
||||||
|
platform_device_register(&d2net_gpio_leds);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* General Setup
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void __init d2net_init(void)
|
||||||
|
{
|
||||||
|
d2net_gpio_leds_init();
|
||||||
|
|
||||||
|
pr_notice("d2net: Flash write are not yet supported.\n");
|
||||||
|
}
|
||||||
@ -15,10 +15,16 @@
|
|||||||
#include <linux/of.h>
|
#include <linux/of.h>
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
#include <linux/cpu.h>
|
#include <linux/cpu.h>
|
||||||
|
#include <linux/mbus.h>
|
||||||
|
#include <linux/clk-provider.h>
|
||||||
|
#include <linux/clocksource.h>
|
||||||
#include <asm/system_misc.h>
|
#include <asm/system_misc.h>
|
||||||
#include <asm/mach/arch.h>
|
#include <asm/mach/arch.h>
|
||||||
|
#include <asm/mach/map.h>
|
||||||
#include <mach/orion5x.h>
|
#include <mach/orion5x.h>
|
||||||
|
#include <mach/bridge-regs.h>
|
||||||
#include <plat/irq.h>
|
#include <plat/irq.h>
|
||||||
|
#include <plat/time.h>
|
||||||
#include "common.h"
|
#include "common.h"
|
||||||
|
|
||||||
static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
|
static struct of_dev_auxdata orion5x_auxdata_lookup[] __initdata = {
|
||||||
@ -39,14 +45,13 @@ static void __init orion5x_dt_init(void)
|
|||||||
orion5x_id(&dev, &rev, &dev_name);
|
orion5x_id(&dev, &rev, &dev_name);
|
||||||
printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
|
printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
|
||||||
|
|
||||||
|
BUG_ON(mvebu_mbus_dt_init());
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Setup Orion address map
|
* Setup Orion address map
|
||||||
*/
|
*/
|
||||||
orion5x_setup_wins();
|
orion5x_setup_wins();
|
||||||
|
|
||||||
/* Setup root of clk tree */
|
|
||||||
clk_init();
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Don't issue "Wait for Interrupt" instruction if we are
|
* Don't issue "Wait for Interrupt" instruction if we are
|
||||||
* running on D0 5281 silicon.
|
* running on D0 5281 silicon.
|
||||||
@ -56,8 +61,8 @@ static void __init orion5x_dt_init(void)
|
|||||||
cpu_idle_poll_ctrl(true);
|
cpu_idle_poll_ctrl(true);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (of_machine_is_compatible("lacie,ethernet-disk-mini-v2"))
|
if (of_machine_is_compatible("maxtor,shared-storage-2"))
|
||||||
edmini_v2_init();
|
mss2_init();
|
||||||
|
|
||||||
of_platform_populate(NULL, of_default_bus_match_table,
|
of_platform_populate(NULL, of_default_bus_match_table,
|
||||||
orion5x_auxdata_lookup, NULL);
|
orion5x_auxdata_lookup, NULL);
|
||||||
@ -71,9 +76,6 @@ static const char *orion5x_dt_compat[] = {
|
|||||||
DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
|
DT_MACHINE_START(ORION5X_DT, "Marvell Orion5x (Flattened Device Tree)")
|
||||||
/* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
|
/* Maintainer: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> */
|
||||||
.map_io = orion5x_map_io,
|
.map_io = orion5x_map_io,
|
||||||
.init_early = orion5x_init_early,
|
|
||||||
.init_irq = orion_dt_init_irq,
|
|
||||||
.init_time = orion5x_timer_init,
|
|
||||||
.init_machine = orion5x_dt_init,
|
.init_machine = orion5x_dt_init,
|
||||||
.restart = orion5x_restart,
|
.restart = orion5x_restart,
|
||||||
.dt_compat = orion5x_dt_compat,
|
.dt_compat = orion5x_dt_compat,
|
||||||
|
|||||||
90
arch/arm/mach-orion5x/board-mss2.c
Normal file
90
arch/arm/mach-orion5x/board-mss2.c
Normal file
@ -0,0 +1,90 @@
|
|||||||
|
/*
|
||||||
|
* Maxtor Shared Storage II Board Setup
|
||||||
|
*
|
||||||
|
* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* as published by the Free Software Foundation; either version
|
||||||
|
* 2 of the License, or (at your option) any later version.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/init.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/pci.h>
|
||||||
|
#include <linux/irq.h>
|
||||||
|
#include <asm/mach-types.h>
|
||||||
|
#include <asm/mach/arch.h>
|
||||||
|
#include <asm/mach/pci.h>
|
||||||
|
#include <mach/orion5x.h>
|
||||||
|
#include <mach/bridge-regs.h>
|
||||||
|
#include "common.h"
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Maxtor Shared Storage II Info
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* PCI setup
|
||||||
|
****************************************************************************/
|
||||||
|
static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||||
|
{
|
||||||
|
int irq;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Check for devices with hard-wired IRQs.
|
||||||
|
*/
|
||||||
|
irq = orion5x_pci_map_irq(dev, slot, pin);
|
||||||
|
if (irq != -1)
|
||||||
|
return irq;
|
||||||
|
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct hw_pci mss2_pci __initdata = {
|
||||||
|
.nr_controllers = 2,
|
||||||
|
.setup = orion5x_pci_sys_setup,
|
||||||
|
.scan = orion5x_pci_sys_scan_bus,
|
||||||
|
.map_irq = mss2_pci_map_irq,
|
||||||
|
};
|
||||||
|
|
||||||
|
static int __init mss2_pci_init(void)
|
||||||
|
{
|
||||||
|
if (machine_is_mss2())
|
||||||
|
pci_common_init(&mss2_pci);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
subsys_initcall(mss2_pci_init);
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* MSS2 power off method
|
||||||
|
****************************************************************************/
|
||||||
|
/*
|
||||||
|
* On the Maxtor Shared Storage II, the shutdown process is the following :
|
||||||
|
* - Userland modifies U-boot env to tell U-boot to go idle at next boot
|
||||||
|
* - The board reboots
|
||||||
|
* - U-boot starts and go into an idle mode until the user press "power"
|
||||||
|
*/
|
||||||
|
static void mss2_power_off(void)
|
||||||
|
{
|
||||||
|
u32 reg;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable and issue soft reset
|
||||||
|
*/
|
||||||
|
reg = readl(RSTOUTn_MASK);
|
||||||
|
reg |= 1 << 2;
|
||||||
|
writel(reg, RSTOUTn_MASK);
|
||||||
|
|
||||||
|
reg = readl(CPU_SOFT_RESET);
|
||||||
|
reg |= 1;
|
||||||
|
writel(reg, CPU_SOFT_RESET);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __init mss2_init(void)
|
||||||
|
{
|
||||||
|
/* register mss2 specific power-off method */
|
||||||
|
pm_power_off = mss2_power_off;
|
||||||
|
}
|
||||||
116
arch/arm/mach-orion5x/board-rd88f5182.c
Normal file
116
arch/arm/mach-orion5x/board-rd88f5182.c
Normal file
@ -0,0 +1,116 @@
|
|||||||
|
/*
|
||||||
|
* arch/arm/mach-orion5x/rd88f5182-setup.c
|
||||||
|
*
|
||||||
|
* Marvell Orion-NAS Reference Design Setup
|
||||||
|
*
|
||||||
|
* Maintainer: Ronen Shitrit <rshitrit@marvell.com>
|
||||||
|
*
|
||||||
|
* This file is licensed under the terms of the GNU General Public
|
||||||
|
* License version 2. This program is licensed "as is" without any
|
||||||
|
* warranty of any kind, whether express or implied.
|
||||||
|
*/
|
||||||
|
#include <linux/gpio.h>
|
||||||
|
#include <linux/kernel.h>
|
||||||
|
#include <linux/init.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/pci.h>
|
||||||
|
#include <linux/irq.h>
|
||||||
|
#include <asm/mach-types.h>
|
||||||
|
#include <asm/mach/arch.h>
|
||||||
|
#include <asm/mach/pci.h>
|
||||||
|
#include <mach/orion5x.h>
|
||||||
|
#include "common.h"
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* RD-88F5182 Info
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PCI
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define RD88F5182_PCI_SLOT0_OFFS 7
|
||||||
|
#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
|
||||||
|
#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* PCI
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static void __init rd88f5182_pci_preinit(void)
|
||||||
|
{
|
||||||
|
int pin;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Configure PCI GPIO IRQ pins
|
||||||
|
*/
|
||||||
|
pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN;
|
||||||
|
if (gpio_request(pin, "PCI IntA") == 0) {
|
||||||
|
if (gpio_direction_input(pin) == 0) {
|
||||||
|
irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
|
||||||
|
} else {
|
||||||
|
printk(KERN_ERR "rd88f5182_pci_preinit failed to "
|
||||||
|
"set_irq_type pin %d\n", pin);
|
||||||
|
gpio_free(pin);
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin);
|
||||||
|
}
|
||||||
|
|
||||||
|
pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN;
|
||||||
|
if (gpio_request(pin, "PCI IntB") == 0) {
|
||||||
|
if (gpio_direction_input(pin) == 0) {
|
||||||
|
irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
|
||||||
|
} else {
|
||||||
|
printk(KERN_ERR "rd88f5182_pci_preinit failed to "
|
||||||
|
"set_irq_type pin %d\n", pin);
|
||||||
|
gpio_free(pin);
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot,
|
||||||
|
u8 pin)
|
||||||
|
{
|
||||||
|
int irq;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Check for devices with hard-wired IRQs.
|
||||||
|
*/
|
||||||
|
irq = orion5x_pci_map_irq(dev, slot, pin);
|
||||||
|
if (irq != -1)
|
||||||
|
return irq;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PCI IRQs are connected via GPIOs
|
||||||
|
*/
|
||||||
|
switch (slot - RD88F5182_PCI_SLOT0_OFFS) {
|
||||||
|
case 0:
|
||||||
|
if (pin == 1)
|
||||||
|
return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN);
|
||||||
|
else
|
||||||
|
return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN);
|
||||||
|
default:
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static struct hw_pci rd88f5182_pci __initdata = {
|
||||||
|
.nr_controllers = 2,
|
||||||
|
.preinit = rd88f5182_pci_preinit,
|
||||||
|
.setup = orion5x_pci_sys_setup,
|
||||||
|
.scan = orion5x_pci_sys_scan_bus,
|
||||||
|
.map_irq = rd88f5182_pci_map_irq,
|
||||||
|
};
|
||||||
|
|
||||||
|
static int __init rd88f5182_pci_init(void)
|
||||||
|
{
|
||||||
|
if (of_machine_is_compatible("marvell,rd-88f5182-nas"))
|
||||||
|
pci_common_init(&rd88f5182_pci);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
subsys_initcall(rd88f5182_pci_init);
|
||||||
@ -64,17 +64,16 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
|
|||||||
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
|
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
|
||||||
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
|
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
|
||||||
|
|
||||||
/* board init functions for boards not fully converted to fdt */
|
|
||||||
#ifdef CONFIG_MACH_EDMINI_V2_DT
|
|
||||||
void edmini_v2_init(void);
|
|
||||||
#else
|
|
||||||
static inline void edmini_v2_init(void) {};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
struct meminfo;
|
struct meminfo;
|
||||||
struct tag;
|
struct tag;
|
||||||
extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
|
extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
|
||||||
|
|
||||||
|
#ifdef CONFIG_MACH_MSS2_DT
|
||||||
|
extern void mss2_init(void);
|
||||||
|
#else
|
||||||
|
static inline void mss2_init(void) {}
|
||||||
|
#endif
|
||||||
|
|
||||||
/*****************************************************************************
|
/*****************************************************************************
|
||||||
* Helpers to access Orion registers
|
* Helpers to access Orion registers
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|||||||
@ -1,365 +0,0 @@
|
|||||||
/*
|
|
||||||
* arch/arm/mach-orion5x/d2net-setup.c
|
|
||||||
*
|
|
||||||
* LaCie d2Network and Big Disk Network NAS setup
|
|
||||||
*
|
|
||||||
* Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
|
|
||||||
*
|
|
||||||
* This file is licensed under the terms of the GNU General Public
|
|
||||||
* License version 2. This program is licensed "as is" without any
|
|
||||||
* warranty of any kind, whether express or implied.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/pci.h>
|
|
||||||
#include <linux/irq.h>
|
|
||||||
#include <linux/mtd/physmap.h>
|
|
||||||
#include <linux/mv643xx_eth.h>
|
|
||||||
#include <linux/leds.h>
|
|
||||||
#include <linux/gpio_keys.h>
|
|
||||||
#include <linux/input.h>
|
|
||||||
#include <linux/i2c.h>
|
|
||||||
#include <linux/ata_platform.h>
|
|
||||||
#include <linux/gpio.h>
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
#include <asm/mach/arch.h>
|
|
||||||
#include <asm/mach/pci.h>
|
|
||||||
#include <mach/orion5x.h>
|
|
||||||
#include <plat/orion-gpio.h>
|
|
||||||
#include "common.h"
|
|
||||||
#include "mpp.h"
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* LaCie d2 Network Info
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* 512KB NOR flash Device bus boot chip select
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define D2NET_NOR_BOOT_BASE 0xfff80000
|
|
||||||
#define D2NET_NOR_BOOT_SIZE SZ_512K
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* 512KB NOR Flash on Boot Device
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* TODO: Check write support on flash MX29LV400CBTC-70G
|
|
||||||
*/
|
|
||||||
|
|
||||||
static struct mtd_partition d2net_partitions[] = {
|
|
||||||
{
|
|
||||||
.name = "Full512kb",
|
|
||||||
.size = MTDPART_SIZ_FULL,
|
|
||||||
.offset = 0,
|
|
||||||
.mask_flags = MTD_WRITEABLE,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct physmap_flash_data d2net_nor_flash_data = {
|
|
||||||
.width = 1,
|
|
||||||
.parts = d2net_partitions,
|
|
||||||
.nr_parts = ARRAY_SIZE(d2net_partitions),
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource d2net_nor_flash_resource = {
|
|
||||||
.flags = IORESOURCE_MEM,
|
|
||||||
.start = D2NET_NOR_BOOT_BASE,
|
|
||||||
.end = D2NET_NOR_BOOT_BASE
|
|
||||||
+ D2NET_NOR_BOOT_SIZE - 1,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device d2net_nor_flash = {
|
|
||||||
.name = "physmap-flash",
|
|
||||||
.id = 0,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &d2net_nor_flash_data,
|
|
||||||
},
|
|
||||||
.num_resources = 1,
|
|
||||||
.resource = &d2net_nor_flash_resource,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* Ethernet
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
static struct mv643xx_eth_platform_data d2net_eth_data = {
|
|
||||||
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* I2C devices
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* i2c addr | chip | description
|
|
||||||
* 0x32 | Ricoh 5C372b | RTC
|
|
||||||
* 0x3e | GMT G762 | PWM fan controller
|
|
||||||
* 0x50 | HT24LC08 | eeprom (1kB)
|
|
||||||
*
|
|
||||||
* TODO: Add G762 support to the g760a driver.
|
|
||||||
*/
|
|
||||||
static struct i2c_board_info __initdata d2net_i2c_devices[] = {
|
|
||||||
{
|
|
||||||
I2C_BOARD_INFO("rs5c372b", 0x32),
|
|
||||||
}, {
|
|
||||||
I2C_BOARD_INFO("24c08", 0x50),
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* SATA
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
static struct mv_sata_platform_data d2net_sata_data = {
|
|
||||||
.n_ports = 2,
|
|
||||||
};
|
|
||||||
|
|
||||||
#define D2NET_GPIO_SATA0_POWER 3
|
|
||||||
#define D2NET_GPIO_SATA1_POWER 12
|
|
||||||
|
|
||||||
static void __init d2net_sata_power_init(void)
|
|
||||||
{
|
|
||||||
int err;
|
|
||||||
|
|
||||||
err = gpio_request(D2NET_GPIO_SATA0_POWER, "SATA0 power");
|
|
||||||
if (err == 0) {
|
|
||||||
err = gpio_direction_output(D2NET_GPIO_SATA0_POWER, 1);
|
|
||||||
if (err)
|
|
||||||
gpio_free(D2NET_GPIO_SATA0_POWER);
|
|
||||||
}
|
|
||||||
if (err)
|
|
||||||
pr_err("d2net: failed to configure SATA0 power GPIO\n");
|
|
||||||
|
|
||||||
err = gpio_request(D2NET_GPIO_SATA1_POWER, "SATA1 power");
|
|
||||||
if (err == 0) {
|
|
||||||
err = gpio_direction_output(D2NET_GPIO_SATA1_POWER, 1);
|
|
||||||
if (err)
|
|
||||||
gpio_free(D2NET_GPIO_SATA1_POWER);
|
|
||||||
}
|
|
||||||
if (err)
|
|
||||||
pr_err("d2net: failed to configure SATA1 power GPIO\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* GPIO LED's
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The blue front LED is wired to the CPLD and can blink in relation with the
|
|
||||||
* SATA activity.
|
|
||||||
*
|
|
||||||
* The following array detail the different LED registers and the combination
|
|
||||||
* of their possible values:
|
|
||||||
*
|
|
||||||
* led_off | blink_ctrl | SATA active | LED state
|
|
||||||
* | | |
|
|
||||||
* 1 | x | x | off
|
|
||||||
* 0 | 0 | 0 | off
|
|
||||||
* 0 | 1 | 0 | blink (rate 300ms)
|
|
||||||
* 0 | x | 1 | on
|
|
||||||
*
|
|
||||||
* Notes: The blue and the red front LED's can't be on at the same time.
|
|
||||||
* Red LED have priority.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define D2NET_GPIO_RED_LED 6
|
|
||||||
#define D2NET_GPIO_BLUE_LED_BLINK_CTRL 16
|
|
||||||
#define D2NET_GPIO_BLUE_LED_OFF 23
|
|
||||||
|
|
||||||
static struct gpio_led d2net_leds[] = {
|
|
||||||
{
|
|
||||||
.name = "d2net:blue:sata",
|
|
||||||
.default_trigger = "default-on",
|
|
||||||
.gpio = D2NET_GPIO_BLUE_LED_OFF,
|
|
||||||
.active_low = 1,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.name = "d2net:red:fail",
|
|
||||||
.gpio = D2NET_GPIO_RED_LED,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct gpio_led_platform_data d2net_led_data = {
|
|
||||||
.num_leds = ARRAY_SIZE(d2net_leds),
|
|
||||||
.leds = d2net_leds,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device d2net_gpio_leds = {
|
|
||||||
.name = "leds-gpio",
|
|
||||||
.id = -1,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &d2net_led_data,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static void __init d2net_gpio_leds_init(void)
|
|
||||||
{
|
|
||||||
int err;
|
|
||||||
|
|
||||||
/* Configure GPIO over MPP max number. */
|
|
||||||
orion_gpio_set_valid(D2NET_GPIO_BLUE_LED_OFF, 1);
|
|
||||||
|
|
||||||
/* Configure register blink_ctrl to allow SATA activity LED blinking. */
|
|
||||||
err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
|
|
||||||
if (err == 0) {
|
|
||||||
err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
|
|
||||||
if (err)
|
|
||||||
gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
|
|
||||||
}
|
|
||||||
if (err)
|
|
||||||
pr_err("d2net: failed to configure blue LED blink GPIO\n");
|
|
||||||
|
|
||||||
platform_device_register(&d2net_gpio_leds);
|
|
||||||
}
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* GPIO keys
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
#define D2NET_GPIO_PUSH_BUTTON 18
|
|
||||||
#define D2NET_GPIO_POWER_SWITCH_ON 8
|
|
||||||
#define D2NET_GPIO_POWER_SWITCH_OFF 9
|
|
||||||
|
|
||||||
#define D2NET_SWITCH_POWER_ON 0x1
|
|
||||||
#define D2NET_SWITCH_POWER_OFF 0x2
|
|
||||||
|
|
||||||
static struct gpio_keys_button d2net_buttons[] = {
|
|
||||||
{
|
|
||||||
.type = EV_SW,
|
|
||||||
.code = D2NET_SWITCH_POWER_OFF,
|
|
||||||
.gpio = D2NET_GPIO_POWER_SWITCH_OFF,
|
|
||||||
.desc = "Power rocker switch (auto|off)",
|
|
||||||
.active_low = 0,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.type = EV_SW,
|
|
||||||
.code = D2NET_SWITCH_POWER_ON,
|
|
||||||
.gpio = D2NET_GPIO_POWER_SWITCH_ON,
|
|
||||||
.desc = "Power rocker switch (on|auto)",
|
|
||||||
.active_low = 0,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.type = EV_KEY,
|
|
||||||
.code = KEY_POWER,
|
|
||||||
.gpio = D2NET_GPIO_PUSH_BUTTON,
|
|
||||||
.desc = "Front Push Button",
|
|
||||||
.active_low = 0,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct gpio_keys_platform_data d2net_button_data = {
|
|
||||||
.buttons = d2net_buttons,
|
|
||||||
.nbuttons = ARRAY_SIZE(d2net_buttons),
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device d2net_gpio_buttons = {
|
|
||||||
.name = "gpio-keys",
|
|
||||||
.id = -1,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &d2net_button_data,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* General Setup
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
static unsigned int d2net_mpp_modes[] __initdata = {
|
|
||||||
MPP0_GPIO, /* Board ID (bit 0) */
|
|
||||||
MPP1_GPIO, /* Board ID (bit 1) */
|
|
||||||
MPP2_GPIO, /* Board ID (bit 2) */
|
|
||||||
MPP3_GPIO, /* SATA 0 power */
|
|
||||||
MPP4_UNUSED,
|
|
||||||
MPP5_GPIO, /* Fan fail detection */
|
|
||||||
MPP6_GPIO, /* Red front LED */
|
|
||||||
MPP7_UNUSED,
|
|
||||||
MPP8_GPIO, /* Rear power switch (on|auto) */
|
|
||||||
MPP9_GPIO, /* Rear power switch (auto|off) */
|
|
||||||
MPP10_UNUSED,
|
|
||||||
MPP11_UNUSED,
|
|
||||||
MPP12_GPIO, /* SATA 1 power */
|
|
||||||
MPP13_UNUSED,
|
|
||||||
MPP14_SATA_LED, /* SATA 0 active */
|
|
||||||
MPP15_SATA_LED, /* SATA 1 active */
|
|
||||||
MPP16_GPIO, /* Blue front LED blink control */
|
|
||||||
MPP17_UNUSED,
|
|
||||||
MPP18_GPIO, /* Front button (0 = Released, 1 = Pushed ) */
|
|
||||||
MPP19_UNUSED,
|
|
||||||
0,
|
|
||||||
/* 22: USB port 1 fuse (0 = Fail, 1 = Ok) */
|
|
||||||
/* 23: Blue front LED off */
|
|
||||||
/* 24: Inhibit board power off (0 = Disabled, 1 = Enabled) */
|
|
||||||
};
|
|
||||||
|
|
||||||
#define D2NET_GPIO_INHIBIT_POWER_OFF 24
|
|
||||||
|
|
||||||
static void __init d2net_init(void)
|
|
||||||
{
|
|
||||||
/*
|
|
||||||
* Setup basic Orion functions. Need to be called early.
|
|
||||||
*/
|
|
||||||
orion5x_init();
|
|
||||||
|
|
||||||
orion5x_mpp_conf(d2net_mpp_modes);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Configure peripherals.
|
|
||||||
*/
|
|
||||||
orion5x_ehci0_init();
|
|
||||||
orion5x_eth_init(&d2net_eth_data);
|
|
||||||
orion5x_i2c_init();
|
|
||||||
orion5x_uart0_init();
|
|
||||||
|
|
||||||
d2net_sata_power_init();
|
|
||||||
orion5x_sata_init(&d2net_sata_data);
|
|
||||||
|
|
||||||
mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
|
|
||||||
ORION_MBUS_DEVBUS_BOOT_ATTR,
|
|
||||||
D2NET_NOR_BOOT_BASE,
|
|
||||||
D2NET_NOR_BOOT_SIZE);
|
|
||||||
platform_device_register(&d2net_nor_flash);
|
|
||||||
|
|
||||||
platform_device_register(&d2net_gpio_buttons);
|
|
||||||
|
|
||||||
d2net_gpio_leds_init();
|
|
||||||
|
|
||||||
pr_notice("d2net: Flash write are not yet supported.\n");
|
|
||||||
|
|
||||||
i2c_register_board_info(0, d2net_i2c_devices,
|
|
||||||
ARRAY_SIZE(d2net_i2c_devices));
|
|
||||||
|
|
||||||
orion_gpio_set_valid(D2NET_GPIO_INHIBIT_POWER_OFF, 1);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
|
|
||||||
|
|
||||||
#ifdef CONFIG_MACH_D2NET
|
|
||||||
MACHINE_START(D2NET, "LaCie d2 Network")
|
|
||||||
.atag_offset = 0x100,
|
|
||||||
.init_machine = d2net_init,
|
|
||||||
.map_io = orion5x_map_io,
|
|
||||||
.init_early = orion5x_init_early,
|
|
||||||
.init_irq = orion5x_init_irq,
|
|
||||||
.init_time = orion5x_timer_init,
|
|
||||||
.fixup = tag_fixup_mem32,
|
|
||||||
.restart = orion5x_restart,
|
|
||||||
MACHINE_END
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_MACH_BIGDISK
|
|
||||||
MACHINE_START(BIGDISK, "LaCie Big Disk Network")
|
|
||||||
.atag_offset = 0x100,
|
|
||||||
.init_machine = d2net_init,
|
|
||||||
.map_io = orion5x_map_io,
|
|
||||||
.init_early = orion5x_init_early,
|
|
||||||
.init_irq = orion5x_init_irq,
|
|
||||||
.init_time = orion5x_timer_init,
|
|
||||||
.fixup = tag_fixup_mem32,
|
|
||||||
.restart = orion5x_restart,
|
|
||||||
MACHINE_END
|
|
||||||
#endif
|
|
||||||
|
|
||||||
@ -1,169 +0,0 @@
|
|||||||
/*
|
|
||||||
* arch/arm/mach-orion5x/edmini_v2-setup.c
|
|
||||||
*
|
|
||||||
* LaCie Ethernet Disk mini V2 Setup
|
|
||||||
*
|
|
||||||
* Copyright (C) 2008 Christopher Moore <moore@free.fr>
|
|
||||||
* Copyright (C) 2008 Albert Aribaud <albert.aribaud@free.fr>
|
|
||||||
*
|
|
||||||
* This file is licensed under the terms of the GNU General Public
|
|
||||||
* License version 2. This program is licensed "as is" without any
|
|
||||||
* warranty of any kind, whether express or implied.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* TODO: add Orion USB device port init when kernel.org support is added.
|
|
||||||
* TODO: add flash write support: see below.
|
|
||||||
* TODO: add power-off support.
|
|
||||||
* TODO: add I2C EEPROM support.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/pci.h>
|
|
||||||
#include <linux/irq.h>
|
|
||||||
#include <linux/mbus.h>
|
|
||||||
#include <linux/mtd/physmap.h>
|
|
||||||
#include <linux/leds.h>
|
|
||||||
#include <linux/gpio_keys.h>
|
|
||||||
#include <linux/input.h>
|
|
||||||
#include <linux/i2c.h>
|
|
||||||
#include <linux/ata_platform.h>
|
|
||||||
#include <linux/gpio.h>
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
#include <asm/mach/arch.h>
|
|
||||||
#include <asm/mach/pci.h>
|
|
||||||
#include <mach/orion5x.h>
|
|
||||||
#include "common.h"
|
|
||||||
#include "mpp.h"
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* EDMINI_V2 Info
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* 512KB NOR flash Device bus boot chip select
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000
|
|
||||||
#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* 512KB NOR Flash on BOOT Device
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Currently the MTD code does not recognize the MX29LV400CBCT as a bottom
|
|
||||||
* -type device. This could cause risks of accidentally erasing critical
|
|
||||||
* flash sectors. We thus define a single, write-protected partition covering
|
|
||||||
* the whole flash.
|
|
||||||
* TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD
|
|
||||||
* code, break this into at least three partitions: 'u-boot code', 'u-boot
|
|
||||||
* environment' and 'whatever is left'.
|
|
||||||
*/
|
|
||||||
|
|
||||||
static struct mtd_partition edmini_v2_partitions[] = {
|
|
||||||
{
|
|
||||||
.name = "Full512kb",
|
|
||||||
.size = 0x00080000,
|
|
||||||
.offset = 0x00000000,
|
|
||||||
.mask_flags = MTD_WRITEABLE,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct physmap_flash_data edmini_v2_nor_flash_data = {
|
|
||||||
.width = 1,
|
|
||||||
.parts = edmini_v2_partitions,
|
|
||||||
.nr_parts = ARRAY_SIZE(edmini_v2_partitions),
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource edmini_v2_nor_flash_resource = {
|
|
||||||
.flags = IORESOURCE_MEM,
|
|
||||||
.start = EDMINI_V2_NOR_BOOT_BASE,
|
|
||||||
.end = EDMINI_V2_NOR_BOOT_BASE
|
|
||||||
+ EDMINI_V2_NOR_BOOT_SIZE - 1,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device edmini_v2_nor_flash = {
|
|
||||||
.name = "physmap-flash",
|
|
||||||
.id = 0,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &edmini_v2_nor_flash_data,
|
|
||||||
},
|
|
||||||
.num_resources = 1,
|
|
||||||
.resource = &edmini_v2_nor_flash_resource,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* RTC 5C372a on I2C bus
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
#define EDMINIV2_RTC_GPIO 3
|
|
||||||
|
|
||||||
static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
|
|
||||||
I2C_BOARD_INFO("rs5c372a", 0x32),
|
|
||||||
.irq = 0,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* General Setup
|
|
||||||
****************************************************************************/
|
|
||||||
static unsigned int edminiv2_mpp_modes[] __initdata = {
|
|
||||||
MPP0_UNUSED,
|
|
||||||
MPP1_UNUSED,
|
|
||||||
MPP2_UNUSED,
|
|
||||||
MPP3_GPIO, /* RTC interrupt */
|
|
||||||
MPP4_UNUSED,
|
|
||||||
MPP5_UNUSED,
|
|
||||||
MPP6_UNUSED,
|
|
||||||
MPP7_UNUSED,
|
|
||||||
MPP8_UNUSED,
|
|
||||||
MPP9_UNUSED,
|
|
||||||
MPP10_UNUSED,
|
|
||||||
MPP11_UNUSED,
|
|
||||||
MPP12_SATA_LED, /* SATA 0 presence */
|
|
||||||
MPP13_SATA_LED, /* SATA 1 presence */
|
|
||||||
MPP14_SATA_LED, /* SATA 0 active */
|
|
||||||
MPP15_SATA_LED, /* SATA 1 active */
|
|
||||||
/* 16: Power LED control (0 = On, 1 = Off) */
|
|
||||||
MPP16_GPIO,
|
|
||||||
/* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */
|
|
||||||
MPP17_GPIO,
|
|
||||||
/* 18: Power button status (0 = Released, 1 = Pressed) */
|
|
||||||
MPP18_GPIO,
|
|
||||||
MPP19_UNUSED,
|
|
||||||
0,
|
|
||||||
};
|
|
||||||
|
|
||||||
void __init edmini_v2_init(void)
|
|
||||||
{
|
|
||||||
orion5x_mpp_conf(edminiv2_mpp_modes);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Configure peripherals.
|
|
||||||
*/
|
|
||||||
orion5x_ehci0_init();
|
|
||||||
|
|
||||||
mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
|
|
||||||
ORION_MBUS_DEVBUS_BOOT_ATTR,
|
|
||||||
EDMINI_V2_NOR_BOOT_BASE,
|
|
||||||
EDMINI_V2_NOR_BOOT_SIZE);
|
|
||||||
platform_device_register(&edmini_v2_nor_flash);
|
|
||||||
|
|
||||||
pr_notice("edmini_v2: USB device port, flash write and power-off "
|
|
||||||
"are not yet supported.\n");
|
|
||||||
|
|
||||||
/* Get RTC IRQ and register the chip */
|
|
||||||
if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) {
|
|
||||||
if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0)
|
|
||||||
edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO);
|
|
||||||
else
|
|
||||||
gpio_free(EDMINIV2_RTC_GPIO);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (edmini_v2_i2c_rtc.irq == 0)
|
|
||||||
pr_warning("edmini_v2: failed to get RTC IRQ\n");
|
|
||||||
|
|
||||||
i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
|
|
||||||
}
|
|
||||||
@ -16,6 +16,7 @@
|
|||||||
#include <mach/bridge-regs.h>
|
#include <mach/bridge-regs.h>
|
||||||
#include <plat/orion-gpio.h>
|
#include <plat/orion-gpio.h>
|
||||||
#include <plat/irq.h>
|
#include <plat/irq.h>
|
||||||
|
#include <asm/exception.h>
|
||||||
#include "common.h"
|
#include "common.h"
|
||||||
|
|
||||||
static int __initdata gpio0_irqs[4] = {
|
static int __initdata gpio0_irqs[4] = {
|
||||||
@ -25,10 +26,37 @@ static int __initdata gpio0_irqs[4] = {
|
|||||||
IRQ_ORION5X_GPIO_24_31,
|
IRQ_ORION5X_GPIO_24_31,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||||
|
/*
|
||||||
|
* Compiling with both non-DT and DT support enabled, will
|
||||||
|
* break asm irq handler used by non-DT boards. Therefore,
|
||||||
|
* we provide a C-style irq handler even for non-DT boards,
|
||||||
|
* if MULTI_IRQ_HANDLER is set.
|
||||||
|
*/
|
||||||
|
|
||||||
|
asmlinkage void
|
||||||
|
__exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs)
|
||||||
|
{
|
||||||
|
u32 stat;
|
||||||
|
|
||||||
|
stat = readl_relaxed(MAIN_IRQ_CAUSE);
|
||||||
|
stat &= readl_relaxed(MAIN_IRQ_MASK);
|
||||||
|
if (stat) {
|
||||||
|
unsigned int hwirq = __fls(stat);
|
||||||
|
handle_IRQ(hwirq, regs);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
void __init orion5x_init_irq(void)
|
void __init orion5x_init_irq(void)
|
||||||
{
|
{
|
||||||
orion_irq_init(0, MAIN_IRQ_MASK);
|
orion_irq_init(0, MAIN_IRQ_MASK);
|
||||||
|
|
||||||
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
||||||
|
set_handle_irq(orion5x_legacy_handle_irq);
|
||||||
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Initialize gpiolib for GPIOs 0-31.
|
* Initialize gpiolib for GPIOs 0-31.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -1,274 +0,0 @@
|
|||||||
/*
|
|
||||||
* Maxtor Shared Storage II Board Setup
|
|
||||||
*
|
|
||||||
* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License
|
|
||||||
* as published by the Free Software Foundation; either version
|
|
||||||
* 2 of the License, or (at your option) any later version.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/pci.h>
|
|
||||||
#include <linux/irq.h>
|
|
||||||
#include <linux/mtd/physmap.h>
|
|
||||||
#include <linux/mv643xx_eth.h>
|
|
||||||
#include <linux/leds.h>
|
|
||||||
#include <linux/gpio_keys.h>
|
|
||||||
#include <linux/input.h>
|
|
||||||
#include <linux/i2c.h>
|
|
||||||
#include <linux/ata_platform.h>
|
|
||||||
#include <linux/gpio.h>
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
#include <asm/mach/arch.h>
|
|
||||||
#include <asm/mach/pci.h>
|
|
||||||
#include <mach/orion5x.h>
|
|
||||||
#include <mach/bridge-regs.h>
|
|
||||||
#include "common.h"
|
|
||||||
#include "mpp.h"
|
|
||||||
|
|
||||||
#define MSS2_NOR_BOOT_BASE 0xff800000
|
|
||||||
#define MSS2_NOR_BOOT_SIZE SZ_256K
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* Maxtor Shared Storage II Info
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Maxtor Shared Storage II hardware :
|
|
||||||
* - Marvell 88F5182-A2 C500
|
|
||||||
* - Marvell 88E1111 Gigabit Ethernet PHY
|
|
||||||
* - RTC M41T81 (@0x68) on I2C bus
|
|
||||||
* - 256KB NOR flash
|
|
||||||
* - 64MB of RAM
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* 256KB NOR Flash on BOOT Device
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
static struct physmap_flash_data mss2_nor_flash_data = {
|
|
||||||
.width = 1,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource mss2_nor_flash_resource = {
|
|
||||||
.flags = IORESOURCE_MEM,
|
|
||||||
.start = MSS2_NOR_BOOT_BASE,
|
|
||||||
.end = MSS2_NOR_BOOT_BASE + MSS2_NOR_BOOT_SIZE - 1,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device mss2_nor_flash = {
|
|
||||||
.name = "physmap-flash",
|
|
||||||
.id = 0,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &mss2_nor_flash_data,
|
|
||||||
},
|
|
||||||
.resource = &mss2_nor_flash_resource,
|
|
||||||
.num_resources = 1,
|
|
||||||
};
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* PCI setup
|
|
||||||
****************************************************************************/
|
|
||||||
static int __init mss2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|
||||||
{
|
|
||||||
int irq;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Check for devices with hard-wired IRQs.
|
|
||||||
*/
|
|
||||||
irq = orion5x_pci_map_irq(dev, slot, pin);
|
|
||||||
if (irq != -1)
|
|
||||||
return irq;
|
|
||||||
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct hw_pci mss2_pci __initdata = {
|
|
||||||
.nr_controllers = 2,
|
|
||||||
.setup = orion5x_pci_sys_setup,
|
|
||||||
.scan = orion5x_pci_sys_scan_bus,
|
|
||||||
.map_irq = mss2_pci_map_irq,
|
|
||||||
};
|
|
||||||
|
|
||||||
static int __init mss2_pci_init(void)
|
|
||||||
{
|
|
||||||
if (machine_is_mss2())
|
|
||||||
pci_common_init(&mss2_pci);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
subsys_initcall(mss2_pci_init);
|
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* Ethernet
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
static struct mv643xx_eth_platform_data mss2_eth_data = {
|
|
||||||
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* SATA
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
static struct mv_sata_platform_data mss2_sata_data = {
|
|
||||||
.n_ports = 2,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* GPIO buttons
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
#define MSS2_GPIO_KEY_RESET 12
|
|
||||||
#define MSS2_GPIO_KEY_POWER 11
|
|
||||||
|
|
||||||
static struct gpio_keys_button mss2_buttons[] = {
|
|
||||||
{
|
|
||||||
.code = KEY_POWER,
|
|
||||||
.gpio = MSS2_GPIO_KEY_POWER,
|
|
||||||
.desc = "Power",
|
|
||||||
.active_low = 1,
|
|
||||||
}, {
|
|
||||||
.code = KEY_RESTART,
|
|
||||||
.gpio = MSS2_GPIO_KEY_RESET,
|
|
||||||
.desc = "Reset",
|
|
||||||
.active_low = 1,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct gpio_keys_platform_data mss2_button_data = {
|
|
||||||
.buttons = mss2_buttons,
|
|
||||||
.nbuttons = ARRAY_SIZE(mss2_buttons),
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device mss2_button_device = {
|
|
||||||
.name = "gpio-keys",
|
|
||||||
.id = -1,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = &mss2_button_data,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* RTC m41t81 on I2C bus
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
#define MSS2_GPIO_RTC_IRQ 3
|
|
||||||
|
|
||||||
static struct i2c_board_info __initdata mss2_i2c_rtc = {
|
|
||||||
I2C_BOARD_INFO("m41t81", 0x68),
|
|
||||||
};
|
|
||||||
|
|
||||||
/*****************************************************************************
|
|
||||||
* MSS2 power off method
|
|
||||||
****************************************************************************/
|
|
||||||
/*
|
|
||||||
* On the Maxtor Shared Storage II, the shutdown process is the following :
|
|
||||||
* - Userland modifies U-boot env to tell U-boot to go idle at next boot
|
|
||||||
* - The board reboots
|
|
||||||
* - U-boot starts and go into an idle mode until the user press "power"
|
|
||||||
*/
|
|
||||||
static void mss2_power_off(void)
|
|
||||||
{
|
|
||||||
u32 reg;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Enable and issue soft reset
|
|
||||||
*/
|
|
||||||
reg = readl(RSTOUTn_MASK);
|
|
||||||
reg |= 1 << 2;
|
|
||||||
writel(reg, RSTOUTn_MASK);
|
|
||||||
|
|
||||||
reg = readl(CPU_SOFT_RESET);
|
|
||||||
reg |= 1;
|
|
||||||
writel(reg, CPU_SOFT_RESET);
|
|
||||||
}
|
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* General Setup
|
|
||||||
****************************************************************************/
|
|
||||||
static unsigned int mss2_mpp_modes[] __initdata = {
|
|
||||||
MPP0_GPIO, /* Power LED */
|
|
||||||
MPP1_GPIO, /* Error LED */
|
|
||||||
MPP2_UNUSED,
|
|
||||||
MPP3_GPIO, /* RTC interrupt */
|
|
||||||
MPP4_GPIO, /* HDD ind. (Single/Dual)*/
|
|
||||||
MPP5_GPIO, /* HD0 5V control */
|
|
||||||
MPP6_GPIO, /* HD0 12V control */
|
|
||||||
MPP7_GPIO, /* HD1 5V control */
|
|
||||||
MPP8_GPIO, /* HD1 12V control */
|
|
||||||
MPP9_UNUSED,
|
|
||||||
MPP10_GPIO, /* Fan control */
|
|
||||||
MPP11_GPIO, /* Power button */
|
|
||||||
MPP12_GPIO, /* Reset button */
|
|
||||||
MPP13_UNUSED,
|
|
||||||
MPP14_SATA_LED, /* SATA 0 active */
|
|
||||||
MPP15_SATA_LED, /* SATA 1 active */
|
|
||||||
MPP16_UNUSED,
|
|
||||||
MPP17_UNUSED,
|
|
||||||
MPP18_UNUSED,
|
|
||||||
MPP19_UNUSED,
|
|
||||||
0,
|
|
||||||
};
|
|
||||||
|
|
||||||
static void __init mss2_init(void)
|
|
||||||
{
|
|
||||||
/* Setup basic Orion functions. Need to be called early. */
|
|
||||||
orion5x_init();
|
|
||||||
|
|
||||||
orion5x_mpp_conf(mss2_mpp_modes);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* MPP[20] Unused
|
|
||||||
* MPP[21] PCI clock
|
|
||||||
* MPP[22] USB 0 over current
|
|
||||||
* MPP[23] USB 1 over current
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Configure peripherals.
|
|
||||||
*/
|
|
||||||
orion5x_ehci0_init();
|
|
||||||
orion5x_ehci1_init();
|
|
||||||
orion5x_eth_init(&mss2_eth_data);
|
|
||||||
orion5x_i2c_init();
|
|
||||||
orion5x_sata_init(&mss2_sata_data);
|
|
||||||
orion5x_uart0_init();
|
|
||||||
orion5x_xor_init();
|
|
||||||
|
|
||||||
mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
|
|
||||||
ORION_MBUS_DEVBUS_BOOT_ATTR,
|
|
||||||
MSS2_NOR_BOOT_BASE,
|
|
||||||
MSS2_NOR_BOOT_SIZE);
|
|
||||||
platform_device_register(&mss2_nor_flash);
|
|
||||||
|
|
||||||
platform_device_register(&mss2_button_device);
|
|
||||||
|
|
||||||
if (gpio_request(MSS2_GPIO_RTC_IRQ, "rtc") == 0) {
|
|
||||||
if (gpio_direction_input(MSS2_GPIO_RTC_IRQ) == 0)
|
|
||||||
mss2_i2c_rtc.irq = gpio_to_irq(MSS2_GPIO_RTC_IRQ);
|
|
||||||
else
|
|
||||||
gpio_free(MSS2_GPIO_RTC_IRQ);
|
|
||||||
}
|
|
||||||
i2c_register_board_info(0, &mss2_i2c_rtc, 1);
|
|
||||||
|
|
||||||
/* register mss2 specific power-off method */
|
|
||||||
pm_power_off = mss2_power_off;
|
|
||||||
}
|
|
||||||
|
|
||||||
MACHINE_START(MSS2, "Maxtor Shared Storage II")
|
|
||||||
/* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */
|
|
||||||
.atag_offset = 0x100,
|
|
||||||
.init_machine = mss2_init,
|
|
||||||
.map_io = orion5x_map_io,
|
|
||||||
.init_early = orion5x_init_early,
|
|
||||||
.init_irq = orion5x_init_irq,
|
|
||||||
.init_time = orion5x_timer_init,
|
|
||||||
.fixup = tag_fixup_mem32,
|
|
||||||
.restart = orion5x_restart,
|
|
||||||
MACHINE_END
|
|
||||||
@ -597,51 +597,3 @@ void __init orion_gpio_init(struct device_node *np,
|
|||||||
|
|
||||||
orion_gpio_chip_count++;
|
orion_gpio_chip_count++;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_OF
|
|
||||||
static void __init orion_gpio_of_init_one(struct device_node *np,
|
|
||||||
int irq_gpio_base)
|
|
||||||
{
|
|
||||||
int ngpio, gpio_base, mask_offset;
|
|
||||||
void __iomem *base;
|
|
||||||
int ret, i;
|
|
||||||
int irqs[4];
|
|
||||||
int secondary_irq_base;
|
|
||||||
|
|
||||||
ret = of_property_read_u32(np, "ngpio", &ngpio);
|
|
||||||
if (ret)
|
|
||||||
goto out;
|
|
||||||
ret = of_property_read_u32(np, "mask-offset", &mask_offset);
|
|
||||||
if (ret == -EINVAL)
|
|
||||||
mask_offset = 0;
|
|
||||||
else
|
|
||||||
goto out;
|
|
||||||
base = of_iomap(np, 0);
|
|
||||||
if (!base)
|
|
||||||
goto out;
|
|
||||||
|
|
||||||
secondary_irq_base = irq_gpio_base + (32 * orion_gpio_chip_count);
|
|
||||||
gpio_base = 32 * orion_gpio_chip_count;
|
|
||||||
|
|
||||||
/* Get the interrupt numbers. Each chip can have up to 4
|
|
||||||
* interrupt handlers, with each handler dealing with 8 GPIO
|
|
||||||
* pins. */
|
|
||||||
|
|
||||||
for (i = 0; i < 4; i++)
|
|
||||||
irqs[i] = irq_of_parse_and_map(np, i);
|
|
||||||
|
|
||||||
orion_gpio_init(np, gpio_base, ngpio, base, mask_offset,
|
|
||||||
secondary_irq_base, irqs);
|
|
||||||
return;
|
|
||||||
out:
|
|
||||||
pr_err("%s: %s: missing mandatory property\n", __func__, np->name);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __init orion_gpio_of_init(int irq_gpio_base)
|
|
||||||
{
|
|
||||||
struct device_node *np;
|
|
||||||
|
|
||||||
for_each_compatible_node(np, NULL, "marvell,orion-gpio")
|
|
||||||
orion_gpio_of_init_one(np, irq_gpio_base);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|||||||
@ -12,5 +12,4 @@
|
|||||||
#define __PLAT_IRQ_H
|
#define __PLAT_IRQ_H
|
||||||
|
|
||||||
void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
|
void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
|
||||||
void __init orion_dt_init_irq(void);
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -33,5 +33,4 @@ void __init orion_gpio_init(struct device_node *np,
|
|||||||
int secondary_irq_base,
|
int secondary_irq_base,
|
||||||
int irq[4]);
|
int irq[4]);
|
||||||
|
|
||||||
void __init orion_gpio_of_init(int irq_gpio_base);
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@ -20,47 +20,6 @@
|
|||||||
#include <plat/orion-gpio.h>
|
#include <plat/orion-gpio.h>
|
||||||
#include <mach/bridge-regs.h>
|
#include <mach/bridge-regs.h>
|
||||||
|
|
||||||
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
|
||||||
/*
|
|
||||||
* Compiling with both non-DT and DT support enabled, will
|
|
||||||
* break asm irq handler used by non-DT boards. Therefore,
|
|
||||||
* we provide a C-style irq handler even for non-DT boards,
|
|
||||||
* if MULTI_IRQ_HANDLER is set.
|
|
||||||
*
|
|
||||||
* Notes:
|
|
||||||
* - this is prepared for Kirkwood and Dove only, update
|
|
||||||
* accordingly if you add Orion5x or MV78x00.
|
|
||||||
* - Orion5x uses different macro names and has only one
|
|
||||||
* set of CAUSE/MASK registers.
|
|
||||||
* - MV78x00 uses the same macro names but has a third
|
|
||||||
* set of CAUSE/MASK registers.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void __iomem *orion_irq_base = IRQ_VIRT_BASE;
|
|
||||||
|
|
||||||
asmlinkage void
|
|
||||||
__exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs)
|
|
||||||
{
|
|
||||||
u32 stat;
|
|
||||||
|
|
||||||
stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF);
|
|
||||||
stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF);
|
|
||||||
if (stat) {
|
|
||||||
unsigned int hwirq = __fls(stat);
|
|
||||||
handle_IRQ(hwirq, regs);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF);
|
|
||||||
stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF);
|
|
||||||
if (stat) {
|
|
||||||
unsigned int hwirq = 32 + __fls(stat);
|
|
||||||
handle_IRQ(hwirq, regs);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
|
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
|
||||||
{
|
{
|
||||||
struct irq_chip_generic *gc;
|
struct irq_chip_generic *gc;
|
||||||
@ -78,40 +37,4 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
|
|||||||
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
ct->chip.irq_unmask = irq_gc_mask_set_bit;
|
||||||
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
|
irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
|
||||||
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
||||||
|
|
||||||
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
|
||||||
set_handle_irq(orion_legacy_handle_irq);
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_OF
|
|
||||||
static int __init orion_add_irq_domain(struct device_node *np,
|
|
||||||
struct device_node *interrupt_parent)
|
|
||||||
{
|
|
||||||
int i = 0;
|
|
||||||
void __iomem *base;
|
|
||||||
|
|
||||||
do {
|
|
||||||
base = of_iomap(np, i);
|
|
||||||
if (base) {
|
|
||||||
orion_irq_init(i * 32, base + 0x04);
|
|
||||||
i++;
|
|
||||||
}
|
|
||||||
} while (base);
|
|
||||||
|
|
||||||
irq_domain_add_legacy(np, i * 32, 0, 0,
|
|
||||||
&irq_domain_simple_ops, NULL);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct of_device_id orion_irq_match[] = {
|
|
||||||
{ .compatible = "marvell,orion-intc",
|
|
||||||
.data = orion_add_irq_domain, },
|
|
||||||
{},
|
|
||||||
};
|
|
||||||
|
|
||||||
void __init orion_dt_init_irq(void)
|
|
||||||
{
|
|
||||||
of_irq_init(orion_irq_match);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user