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ARM: bcm2835: enable GPIO/pinctrl
Enable GPIO and pinctrl in Kconfig. Add required <mach/gpio.h> for gpiolib. Instantiate the BCM2835 GPIO module in bcm2835.dtsi. Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the board's required pinmux configuration. GPIO aren't specified; that's left to gpio_request(). Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -336,7 +336,7 @@ config ARCH_AT91
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config ARCH_BCM2835
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bool "Broadcom BCM2835 family"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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select ARM_AMBA
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select ARM_ERRATA_411920
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select ARM_TIMER_SP804
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@ -344,7 +344,10 @@ config ARCH_BCM2835
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select COMMON_CLK
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select CPU_V6
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select GENERIC_CLOCKEVENTS
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select GENERIC_GPIO
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select MULTI_IRQ_HANDLER
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select PINCTRL
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select PINCTRL_BCM2835
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select SPARSE_IRQ
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select USE_OF
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help
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@ -10,3 +10,18 @@
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reg = <0 0x10000000>;
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};
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};
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&gpio {
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pinctrl-names = "default";
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pinctrl-0 = <&alt0 &alt3>;
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alt0: alt0 {
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brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 14 15 40 45>;
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brcm,function = <4>; /* alt0 */
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};
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alt3: alt3 {
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brcm,pins = <48 49 50 51 52 53>;
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brcm,function = <7>; /* alt3 */
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};
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};
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@ -40,5 +40,28 @@
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interrupts = <2 25>;
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clock-frequency = <3000000>;
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};
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gpio: gpio {
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compatible = "brcm,bcm2835-gpio";
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reg = <0x7e200000 0xb4>;
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/*
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* The GPIO IP block is designed for 3 banks of GPIOs.
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* Each bank has a GPIO interrupt for itself.
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* There is an overall "any bank" interrupt.
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* In order, these are GIC interrupts 17, 18, 19, 20.
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* Since the BCM2835 only has 2 banks, the 2nd bank
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* interrupt output appears to be mirrored onto the
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* 3rd bank's interrupt signal.
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* So, a bank0 interrupt shows up on 17, 20, and
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* a bank1 interrupt shows up on 18, 19, 20!
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*/
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interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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};
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1
arch/arm/mach-bcm2835/include/mach/gpio.h
Normal file
1
arch/arm/mach-bcm2835/include/mach/gpio.h
Normal file
@ -0,0 +1 @@
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/* empty */
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