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media: venus: hfi: Define additional 6xx registers
- Add X2 RPMh registers and definitions from the downstream example. - Add 6xx core power definitions - Add 6xx AON definitions - Add 6xx wrapper tz definitions - Add 6xx wrapper interrupt definitions - Add 6xx soft interrupt definitions - Define wrapper LPI register offsets Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Co-developed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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@ -56,10 +56,22 @@
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#define UC_REGION_ADDR 0x64
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#define UC_REGION_SIZE 0x68
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#define CPU_CS_H2XSOFTINTEN_V6 0x148
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#define CPU_CS_X2RPMH_V6 0x168
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#define CPU_CS_X2RPMH_MASK0_BMSK_V6 0x1
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#define CPU_CS_X2RPMH_MASK0_SHFT_V6 0x0
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#define CPU_CS_X2RPMH_MASK1_BMSK_V6 0x2
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#define CPU_CS_X2RPMH_MASK1_SHFT_V6 0x1
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#define CPU_CS_X2RPMH_SWOVERRIDE_BMSK_V6 0x4
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#define CPU_CS_X2RPMH_SWOVERRIDE_SHFT_V6 0x3
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/* Relative to CPU_IC_BASE */
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#define CPU_IC_SOFTINT 0x18
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#define CPU_IC_SOFTINT_V6 0x150
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#define CPU_IC_SOFTINT_H2A_MASK 0x8000
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#define CPU_IC_SOFTINT_H2A_SHIFT 0xf
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#define CPU_IC_SOFTINT_H2A_SHIFT_V6 0x0
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/* Venus wrapper */
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#define WRAPPER_BASE_V6 0x000b0000
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@ -88,6 +100,9 @@
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#define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4
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#define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2
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#define WRAPPER_INTR_STATUS_A2HWD_MASK_V6 0x8
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#define WRAPPER_INTR_MASK_A2HWD_BASK_V6 0x8
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#define WRAPPER_INTR_CLEAR 0x14
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#define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10
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#define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4
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@ -97,6 +112,8 @@
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#define WRAPPER_POWER_STATUS 0x44
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#define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48
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#define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c
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#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6 0x54
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#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6 0x58
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#define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64
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#define WRAPPER_CPU_CLOCK_CONFIG 0x2000
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@ -125,4 +142,17 @@
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#define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110
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#define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114
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/* Venus 6xx */
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#define WRAPPER_CORE_POWER_STATUS_V6 0x80
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#define WRAPPER_CORE_POWER_CONTROL_V6 0x84
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/* Wrapper TZ 6xx */
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#define WRAPPER_TZ_BASE_V6 0x000c0000
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#define WRAPPER_TZ_CPU_STATUS_V6 0x10
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/* Venus AON */
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#define AON_BASE_V6 0x000e0000
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#define AON_WRAPPER_MVP_NOC_LPI_CONTROL 0x00
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#define AON_WRAPPER_MVP_NOC_LPI_STATUS 0x04
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#endif
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