net: stmmac: Change MAC interface to support multiple filter configurations

The synopsys EMAC can be configured for different numbers of multicast hash
bins and perfect filter entries at device creation time and there's no way
to query this configuration information at runtime. As a result, a devicetree
parameter is required in order for the driver to program these filters
correctly for a particular device instance. This patch modifies the
10/100/1000 MAC software interface such that these configuration parameters
can be set at initialization time.

Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vince Bridgers 2014-07-31 15:49:13 -05:00 committed by David S. Miller
parent a173e550c2
commit 7ed24bbe18
5 changed files with 91 additions and 62 deletions

View File

@ -368,34 +368,36 @@ struct stmmac_dma_ops {
void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt); void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt);
}; };
struct mac_device_info;
struct stmmac_ops { struct stmmac_ops {
/* MAC core initialization */ /* MAC core initialization */
void (*core_init) (void __iomem *ioaddr, int mtu); void (*core_init)(struct mac_device_info *hw, int mtu);
/* Enable and verify that the IPC module is supported */ /* Enable and verify that the IPC module is supported */
int (*rx_ipc) (void __iomem *ioaddr); int (*rx_ipc)(struct mac_device_info *hw);
/* Dump MAC registers */ /* Dump MAC registers */
void (*dump_regs) (void __iomem *ioaddr); void (*dump_regs)(struct mac_device_info *hw);
/* Handle extra events on specific interrupts hw dependent */ /* Handle extra events on specific interrupts hw dependent */
int (*host_irq_status) (void __iomem *ioaddr, int (*host_irq_status)(struct mac_device_info *hw,
struct stmmac_extra_stats *x); struct stmmac_extra_stats *x);
/* Multicast filter setting */ /* Multicast filter setting */
void (*set_filter) (struct net_device *dev, int id); void (*set_filter)(struct net_device *dev, int id);
/* Flow control setting */ /* Flow control setting */
void (*flow_ctrl) (void __iomem *ioaddr, unsigned int duplex, void (*flow_ctrl)(struct mac_device_info *hw, unsigned int duplex,
unsigned int fc, unsigned int pause_time); unsigned int fc, unsigned int pause_time);
/* Set power management mode (e.g. magic frame) */ /* Set power management mode (e.g. magic frame) */
void (*pmt) (void __iomem *ioaddr, unsigned long mode); void (*pmt)(struct mac_device_info *hw, unsigned long mode);
/* Set/Get Unicast MAC addresses */ /* Set/Get Unicast MAC addresses */
void (*set_umac_addr) (void __iomem *ioaddr, unsigned char *addr, void (*set_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
unsigned int reg_n); unsigned int reg_n);
void (*get_umac_addr) (void __iomem *ioaddr, unsigned char *addr, void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
unsigned int reg_n); unsigned int reg_n);
void (*set_eee_mode) (void __iomem *ioaddr); void (*set_eee_mode)(struct mac_device_info *hw);
void (*reset_eee_mode) (void __iomem *ioaddr); void (*reset_eee_mode)(struct mac_device_info *hw);
void (*set_eee_timer) (void __iomem *ioaddr, int ls, int tw); void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
void (*set_eee_pls) (void __iomem *ioaddr, int link); void (*set_eee_pls)(struct mac_device_info *hw, int link);
void (*ctrl_ane) (void __iomem *ioaddr, bool restart); void (*ctrl_ane)(struct mac_device_info *hw, bool restart);
void (*get_adv) (void __iomem *ioaddr, struct rgmii_adv *adv); void (*get_adv)(struct mac_device_info *hw, struct rgmii_adv *adv);
}; };
struct stmmac_hwtimestamp { struct stmmac_hwtimestamp {
@ -439,6 +441,7 @@ struct mac_device_info {
struct mii_regs mii; /* MII register Addresses */ struct mii_regs mii; /* MII register Addresses */
struct mac_link link; struct mac_link link;
unsigned int synopsys_uid; unsigned int synopsys_uid;
void __iomem *pcsr; /* vpointer to device CSRs */
}; };
struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr); struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr);

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@ -32,8 +32,9 @@
#include <asm/io.h> #include <asm/io.h>
#include "dwmac1000.h" #include "dwmac1000.h"
static void dwmac1000_core_init(void __iomem *ioaddr, int mtu) static void dwmac1000_core_init(struct mac_device_info *hw, int mtu)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value = readl(ioaddr + GMAC_CONTROL); u32 value = readl(ioaddr + GMAC_CONTROL);
value |= GMAC_CORE_INIT; value |= GMAC_CORE_INIT;
if (mtu > 1500) if (mtu > 1500)
@ -52,8 +53,9 @@ static void dwmac1000_core_init(void __iomem *ioaddr, int mtu)
#endif #endif
} }
static int dwmac1000_rx_ipc_enable(void __iomem *ioaddr) static int dwmac1000_rx_ipc_enable(struct mac_device_info *hw)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value = readl(ioaddr + GMAC_CONTROL); u32 value = readl(ioaddr + GMAC_CONTROL);
value |= GMAC_CONTROL_IPC; value |= GMAC_CONTROL_IPC;
@ -64,8 +66,9 @@ static int dwmac1000_rx_ipc_enable(void __iomem *ioaddr)
return !!(value & GMAC_CONTROL_IPC); return !!(value & GMAC_CONTROL_IPC);
} }
static void dwmac1000_dump_regs(void __iomem *ioaddr) static void dwmac1000_dump_regs(struct mac_device_info *hw)
{ {
void __iomem *ioaddr = hw->pcsr;
int i; int i;
pr_info("\tDWMAC1000 regs (base addr = 0x%p)\n", ioaddr); pr_info("\tDWMAC1000 regs (base addr = 0x%p)\n", ioaddr);
@ -76,16 +79,20 @@ static void dwmac1000_dump_regs(void __iomem *ioaddr)
} }
} }
static void dwmac1000_set_umac_addr(void __iomem *ioaddr, unsigned char *addr, static void dwmac1000_set_umac_addr(struct mac_device_info *hw,
unsigned char *addr,
unsigned int reg_n) unsigned int reg_n)
{ {
void __iomem *ioaddr = hw->pcsr;
stmmac_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), stmmac_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n),
GMAC_ADDR_LOW(reg_n)); GMAC_ADDR_LOW(reg_n));
} }
static void dwmac1000_get_umac_addr(void __iomem *ioaddr, unsigned char *addr, static void dwmac1000_get_umac_addr(struct mac_device_info *hw,
unsigned char *addr,
unsigned int reg_n) unsigned int reg_n)
{ {
void __iomem *ioaddr = hw->pcsr;
stmmac_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n), stmmac_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n),
GMAC_ADDR_LOW(reg_n)); GMAC_ADDR_LOW(reg_n));
} }
@ -146,7 +153,9 @@ static void dwmac1000_set_filter(struct net_device *dev, int id)
struct netdev_hw_addr *ha; struct netdev_hw_addr *ha;
netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr(ha, dev) {
dwmac1000_set_umac_addr(ioaddr, ha->addr, reg); stmmac_get_mac_addr(ioaddr, ha->addr,
GMAC_ADDR_HIGH(reg),
GMAC_ADDR_LOW(reg));
reg++; reg++;
} }
} }
@ -162,9 +171,11 @@ static void dwmac1000_set_filter(struct net_device *dev, int id)
readl(ioaddr + GMAC_HASH_HIGH), readl(ioaddr + GMAC_HASH_LOW)); readl(ioaddr + GMAC_HASH_HIGH), readl(ioaddr + GMAC_HASH_LOW));
} }
static void dwmac1000_flow_ctrl(void __iomem *ioaddr, unsigned int duplex,
static void dwmac1000_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
unsigned int fc, unsigned int pause_time) unsigned int fc, unsigned int pause_time)
{ {
void __iomem *ioaddr = hw->pcsr;
unsigned int flow = 0; unsigned int flow = 0;
pr_debug("GMAC Flow-Control:\n"); pr_debug("GMAC Flow-Control:\n");
@ -185,8 +196,9 @@ static void dwmac1000_flow_ctrl(void __iomem *ioaddr, unsigned int duplex,
writel(flow, ioaddr + GMAC_FLOW_CTRL); writel(flow, ioaddr + GMAC_FLOW_CTRL);
} }
static void dwmac1000_pmt(void __iomem *ioaddr, unsigned long mode) static void dwmac1000_pmt(struct mac_device_info *hw, unsigned long mode)
{ {
void __iomem *ioaddr = hw->pcsr;
unsigned int pmt = 0; unsigned int pmt = 0;
if (mode & WAKE_MAGIC) { if (mode & WAKE_MAGIC) {
@ -201,9 +213,10 @@ static void dwmac1000_pmt(void __iomem *ioaddr, unsigned long mode)
writel(pmt, ioaddr + GMAC_PMT); writel(pmt, ioaddr + GMAC_PMT);
} }
static int dwmac1000_irq_status(void __iomem *ioaddr, static int dwmac1000_irq_status(struct mac_device_info *hw,
struct stmmac_extra_stats *x) struct stmmac_extra_stats *x)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 intr_status = readl(ioaddr + GMAC_INT_STATUS); u32 intr_status = readl(ioaddr + GMAC_INT_STATUS);
int ret = 0; int ret = 0;
@ -268,8 +281,9 @@ static int dwmac1000_irq_status(void __iomem *ioaddr,
return ret; return ret;
} }
static void dwmac1000_set_eee_mode(void __iomem *ioaddr) static void dwmac1000_set_eee_mode(struct mac_device_info *hw)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value; u32 value;
/* Enable the link status receive on RGMII, SGMII ore SMII /* Enable the link status receive on RGMII, SGMII ore SMII
@ -281,8 +295,9 @@ static void dwmac1000_set_eee_mode(void __iomem *ioaddr)
writel(value, ioaddr + LPI_CTRL_STATUS); writel(value, ioaddr + LPI_CTRL_STATUS);
} }
static void dwmac1000_reset_eee_mode(void __iomem *ioaddr) static void dwmac1000_reset_eee_mode(struct mac_device_info *hw)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value; u32 value;
value = readl(ioaddr + LPI_CTRL_STATUS); value = readl(ioaddr + LPI_CTRL_STATUS);
@ -290,8 +305,9 @@ static void dwmac1000_reset_eee_mode(void __iomem *ioaddr)
writel(value, ioaddr + LPI_CTRL_STATUS); writel(value, ioaddr + LPI_CTRL_STATUS);
} }
static void dwmac1000_set_eee_pls(void __iomem *ioaddr, int link) static void dwmac1000_set_eee_pls(struct mac_device_info *hw, int link)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value; u32 value;
value = readl(ioaddr + LPI_CTRL_STATUS); value = readl(ioaddr + LPI_CTRL_STATUS);
@ -304,8 +320,9 @@ static void dwmac1000_set_eee_pls(void __iomem *ioaddr, int link)
writel(value, ioaddr + LPI_CTRL_STATUS); writel(value, ioaddr + LPI_CTRL_STATUS);
} }
static void dwmac1000_set_eee_timer(void __iomem *ioaddr, int ls, int tw) static void dwmac1000_set_eee_timer(struct mac_device_info *hw, int ls, int tw)
{ {
void __iomem *ioaddr = hw->pcsr;
int value = ((tw & 0xffff)) | ((ls & 0x7ff) << 16); int value = ((tw & 0xffff)) | ((ls & 0x7ff) << 16);
/* Program the timers in the LPI timer control register: /* Program the timers in the LPI timer control register:
@ -318,8 +335,9 @@ static void dwmac1000_set_eee_timer(void __iomem *ioaddr, int ls, int tw)
writel(value, ioaddr + LPI_TIMER_CTRL); writel(value, ioaddr + LPI_TIMER_CTRL);
} }
static void dwmac1000_ctrl_ane(void __iomem *ioaddr, bool restart) static void dwmac1000_ctrl_ane(struct mac_device_info *hw, bool restart)
{ {
void __iomem *ioaddr = hw->pcsr;
/* auto negotiation enable and External Loopback enable */ /* auto negotiation enable and External Loopback enable */
u32 value = GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_ELE; u32 value = GMAC_AN_CTRL_ANE | GMAC_AN_CTRL_ELE;
@ -329,8 +347,9 @@ static void dwmac1000_ctrl_ane(void __iomem *ioaddr, bool restart)
writel(value, ioaddr + GMAC_AN_CTRL); writel(value, ioaddr + GMAC_AN_CTRL);
} }
static void dwmac1000_get_adv(void __iomem *ioaddr, struct rgmii_adv *adv) static void dwmac1000_get_adv(struct mac_device_info *hw, struct rgmii_adv *adv)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value = readl(ioaddr + GMAC_ANE_ADV); u32 value = readl(ioaddr + GMAC_ANE_ADV);
if (value & GMAC_ANE_FD) if (value & GMAC_ANE_FD)
@ -377,6 +396,7 @@ struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr)
if (!mac) if (!mac)
return NULL; return NULL;
mac->pcsr = ioaddr;
mac->mac = &dwmac1000_ops; mac->mac = &dwmac1000_ops;
mac->dma = &dwmac1000_dma_ops; mac->dma = &dwmac1000_dma_ops;

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@ -32,8 +32,9 @@
#include <asm/io.h> #include <asm/io.h>
#include "dwmac100.h" #include "dwmac100.h"
static void dwmac100_core_init(void __iomem *ioaddr, int mtu) static void dwmac100_core_init(struct mac_device_info *hw, int mtu)
{ {
void __iomem *ioaddr = hw->pcsr;
u32 value = readl(ioaddr + MAC_CONTROL); u32 value = readl(ioaddr + MAC_CONTROL);
writel((value | MAC_CORE_INIT), ioaddr + MAC_CONTROL); writel((value | MAC_CORE_INIT), ioaddr + MAC_CONTROL);
@ -43,8 +44,9 @@ static void dwmac100_core_init(void __iomem *ioaddr, int mtu)
#endif #endif
} }
static void dwmac100_dump_mac_regs(void __iomem *ioaddr) static void dwmac100_dump_mac_regs(struct mac_device_info *hw)
{ {
void __iomem *ioaddr = hw->pcsr;
pr_info("\t----------------------------------------------\n" pr_info("\t----------------------------------------------\n"
"\t DWMAC 100 CSR (base addr = 0x%p)\n" "\t DWMAC 100 CSR (base addr = 0x%p)\n"
"\t----------------------------------------------\n", ioaddr); "\t----------------------------------------------\n", ioaddr);
@ -66,26 +68,30 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
readl(ioaddr + MAC_VLAN2)); readl(ioaddr + MAC_VLAN2));
} }
static int dwmac100_rx_ipc_enable(void __iomem *ioaddr) static int dwmac100_rx_ipc_enable(struct mac_device_info *hw)
{ {
return 0; return 0;
} }
static int dwmac100_irq_status(void __iomem *ioaddr, static int dwmac100_irq_status(struct mac_device_info *hw,
struct stmmac_extra_stats *x) struct stmmac_extra_stats *x)
{ {
return 0; return 0;
} }
static void dwmac100_set_umac_addr(void __iomem *ioaddr, unsigned char *addr, static void dwmac100_set_umac_addr(struct mac_device_info *hw,
unsigned char *addr,
unsigned int reg_n) unsigned int reg_n)
{ {
void __iomem *ioaddr = hw->pcsr;
stmmac_set_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW); stmmac_set_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
} }
static void dwmac100_get_umac_addr(void __iomem *ioaddr, unsigned char *addr, static void dwmac100_get_umac_addr(struct mac_device_info *hw,
unsigned char *addr,
unsigned int reg_n) unsigned int reg_n)
{ {
void __iomem *ioaddr = hw->pcsr;
stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW); stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
} }
@ -137,9 +143,10 @@ static void dwmac100_set_filter(struct net_device *dev, int id)
writel(value, ioaddr + MAC_CONTROL); writel(value, ioaddr + MAC_CONTROL);
} }
static void dwmac100_flow_ctrl(void __iomem *ioaddr, unsigned int duplex, static void dwmac100_flow_ctrl(struct mac_device_info *hw, unsigned int duplex,
unsigned int fc, unsigned int pause_time) unsigned int fc, unsigned int pause_time)
{ {
void __iomem *ioaddr = hw->pcsr;
unsigned int flow = MAC_FLOW_CTRL_ENABLE; unsigned int flow = MAC_FLOW_CTRL_ENABLE;
if (duplex) if (duplex)
@ -148,7 +155,7 @@ static void dwmac100_flow_ctrl(void __iomem *ioaddr, unsigned int duplex,
} }
/* No PMT module supported on ST boards with this Eth chip. */ /* No PMT module supported on ST boards with this Eth chip. */
static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode) static void dwmac100_pmt(struct mac_device_info *hw, unsigned long mode)
{ {
return; return;
} }
@ -175,6 +182,7 @@ struct mac_device_info *dwmac100_setup(void __iomem *ioaddr)
pr_info("\tDWMAC100\n"); pr_info("\tDWMAC100\n");
mac->pcsr = ioaddr;
mac->mac = &dwmac100_ops; mac->mac = &dwmac100_ops;
mac->dma = &dwmac100_dma_ops; mac->dma = &dwmac100_dma_ops;

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@ -262,7 +262,7 @@ static int stmmac_ethtool_getsettings(struct net_device *dev,
/* Get and convert ADV/LP_ADV from the HW AN registers */ /* Get and convert ADV/LP_ADV from the HW AN registers */
if (priv->hw->mac->get_adv) if (priv->hw->mac->get_adv)
priv->hw->mac->get_adv(priv->ioaddr, &adv); priv->hw->mac->get_adv(priv->hw, &adv);
else else
return -EOPNOTSUPP; /* should never happen indeed */ return -EOPNOTSUPP; /* should never happen indeed */
@ -350,7 +350,7 @@ static int stmmac_ethtool_setsettings(struct net_device *dev,
spin_lock(&priv->lock); spin_lock(&priv->lock);
if (priv->hw->mac->ctrl_ane) if (priv->hw->mac->ctrl_ane)
priv->hw->mac->ctrl_ane(priv->ioaddr, 1); priv->hw->mac->ctrl_ane(priv->hw, 1);
spin_unlock(&priv->lock); spin_unlock(&priv->lock);
} }
@ -464,7 +464,7 @@ stmmac_set_pauseparam(struct net_device *netdev,
if (netif_running(netdev)) if (netif_running(netdev))
ret = phy_start_aneg(phy); ret = phy_start_aneg(phy);
} else } else
priv->hw->mac->flow_ctrl(priv->ioaddr, phy->duplex, priv->hw->mac->flow_ctrl(priv->hw, phy->duplex,
priv->flow_ctrl, priv->pause); priv->flow_ctrl, priv->pause);
return ret; return ret;
} }

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@ -233,7 +233,7 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
/* Check and enter in LPI mode */ /* Check and enter in LPI mode */
if ((priv->dirty_tx == priv->cur_tx) && if ((priv->dirty_tx == priv->cur_tx) &&
(priv->tx_path_in_lpi_mode == false)) (priv->tx_path_in_lpi_mode == false))
priv->hw->mac->set_eee_mode(priv->ioaddr); priv->hw->mac->set_eee_mode(priv->hw);
} }
/** /**
@ -244,7 +244,7 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
*/ */
void stmmac_disable_eee_mode(struct stmmac_priv *priv) void stmmac_disable_eee_mode(struct stmmac_priv *priv)
{ {
priv->hw->mac->reset_eee_mode(priv->ioaddr); priv->hw->mac->reset_eee_mode(priv->hw);
del_timer_sync(&priv->eee_ctrl_timer); del_timer_sync(&priv->eee_ctrl_timer);
priv->tx_path_in_lpi_mode = false; priv->tx_path_in_lpi_mode = false;
} }
@ -298,7 +298,7 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
if (priv->eee_active) { if (priv->eee_active) {
pr_debug("stmmac: disable EEE\n"); pr_debug("stmmac: disable EEE\n");
del_timer_sync(&priv->eee_ctrl_timer); del_timer_sync(&priv->eee_ctrl_timer);
priv->hw->mac->set_eee_timer(priv->ioaddr, 0, priv->hw->mac->set_eee_timer(priv->hw, 0,
tx_lpi_timer); tx_lpi_timer);
} }
priv->eee_active = 0; priv->eee_active = 0;
@ -313,12 +313,12 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
priv->eee_ctrl_timer.expires = STMMAC_LPI_T(eee_timer); priv->eee_ctrl_timer.expires = STMMAC_LPI_T(eee_timer);
add_timer(&priv->eee_ctrl_timer); add_timer(&priv->eee_ctrl_timer);
priv->hw->mac->set_eee_timer(priv->ioaddr, priv->hw->mac->set_eee_timer(priv->hw,
STMMAC_DEFAULT_LIT_LS, STMMAC_DEFAULT_LIT_LS,
tx_lpi_timer); tx_lpi_timer);
} else } else
/* Set HW EEE according to the speed */ /* Set HW EEE according to the speed */
priv->hw->mac->set_eee_pls(priv->ioaddr, priv->hw->mac->set_eee_pls(priv->hw,
priv->phydev->link); priv->phydev->link);
pr_debug("stmmac: Energy-Efficient Ethernet initialized\n"); pr_debug("stmmac: Energy-Efficient Ethernet initialized\n");
@ -693,7 +693,7 @@ static void stmmac_adjust_link(struct net_device *dev)
} }
/* Flow Control operation */ /* Flow Control operation */
if (phydev->pause) if (phydev->pause)
priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex, priv->hw->mac->flow_ctrl(priv->hw, phydev->duplex,
fc, pause_time); fc, pause_time);
if (phydev->speed != priv->speed) { if (phydev->speed != priv->speed) {
@ -1531,8 +1531,7 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv)
static void stmmac_check_ether_addr(struct stmmac_priv *priv) static void stmmac_check_ether_addr(struct stmmac_priv *priv)
{ {
if (!is_valid_ether_addr(priv->dev->dev_addr)) { if (!is_valid_ether_addr(priv->dev->dev_addr)) {
priv->hw->mac->get_umac_addr((void __iomem *) priv->hw->mac->get_umac_addr(priv->hw,
priv->dev->base_addr,
priv->dev->dev_addr, 0); priv->dev->dev_addr, 0);
if (!is_valid_ether_addr(priv->dev->dev_addr)) if (!is_valid_ether_addr(priv->dev->dev_addr))
eth_hw_addr_random(priv->dev); eth_hw_addr_random(priv->dev);
@ -1629,14 +1628,14 @@ static int stmmac_hw_setup(struct net_device *dev)
} }
/* Copy the MAC addr into the HW */ /* Copy the MAC addr into the HW */
priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0); priv->hw->mac->set_umac_addr(priv->hw, dev->dev_addr, 0);
/* If required, perform hw setup of the bus. */ /* If required, perform hw setup of the bus. */
if (priv->plat->bus_setup) if (priv->plat->bus_setup)
priv->plat->bus_setup(priv->ioaddr); priv->plat->bus_setup(priv->ioaddr);
/* Initialize the MAC Core */ /* Initialize the MAC Core */
priv->hw->mac->core_init(priv->ioaddr, dev->mtu); priv->hw->mac->core_init(priv->hw, dev->mtu);
/* Enable the MAC Rx/Tx */ /* Enable the MAC Rx/Tx */
stmmac_set_mac(priv->ioaddr, true); stmmac_set_mac(priv->ioaddr, true);
@ -1662,7 +1661,7 @@ static int stmmac_hw_setup(struct net_device *dev)
/* Dump DMA/MAC registers */ /* Dump DMA/MAC registers */
if (netif_msg_hw(priv)) { if (netif_msg_hw(priv)) {
priv->hw->mac->dump_regs(priv->ioaddr); priv->hw->mac->dump_regs(priv->hw);
priv->hw->dma->dump_regs(priv->ioaddr); priv->hw->dma->dump_regs(priv->ioaddr);
} }
priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS; priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
@ -1677,7 +1676,7 @@ static int stmmac_hw_setup(struct net_device *dev)
} }
if (priv->pcs && priv->hw->mac->ctrl_ane) if (priv->pcs && priv->hw->mac->ctrl_ane)
priv->hw->mac->ctrl_ane(priv->ioaddr, 0); priv->hw->mac->ctrl_ane(priv->hw, 0);
return 0; return 0;
} }
@ -2316,8 +2315,7 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
/* To handle GMAC own interrupts */ /* To handle GMAC own interrupts */
if (priv->plat->has_gmac) { if (priv->plat->has_gmac) {
int status = priv->hw->mac->host_irq_status((void __iomem *) int status = priv->hw->mac->host_irq_status(priv->hw,
dev->base_addr,
&priv->xstats); &priv->xstats);
if (unlikely(status)) { if (unlikely(status)) {
/* For LPI we need to save the tx status */ /* For LPI we need to save the tx status */
@ -2649,7 +2647,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
/* To use alternate (extended) or normal descriptor structures */ /* To use alternate (extended) or normal descriptor structures */
stmmac_selec_desc_mode(priv); stmmac_selec_desc_mode(priv);
ret = priv->hw->mac->rx_ipc(priv->ioaddr); ret = priv->hw->mac->rx_ipc(priv->hw);
if (!ret) { if (!ret) {
pr_warn(" RX IPC Checksum Offload not configured.\n"); pr_warn(" RX IPC Checksum Offload not configured.\n");
priv->plat->rx_coe = STMMAC_RX_COE_NONE; priv->plat->rx_coe = STMMAC_RX_COE_NONE;
@ -2869,7 +2867,7 @@ int stmmac_suspend(struct net_device *ndev)
/* Enable Power down mode by programming the PMT regs */ /* Enable Power down mode by programming the PMT regs */
if (device_may_wakeup(priv->device)) { if (device_may_wakeup(priv->device)) {
priv->hw->mac->pmt(priv->ioaddr, priv->wolopts); priv->hw->mac->pmt(priv->hw, priv->wolopts);
priv->irq_wake = 1; priv->irq_wake = 1;
} else { } else {
stmmac_set_mac(priv->ioaddr, false); stmmac_set_mac(priv->ioaddr, false);
@ -2902,7 +2900,7 @@ int stmmac_resume(struct net_device *ndev)
* from another devices (e.g. serial console). * from another devices (e.g. serial console).
*/ */
if (device_may_wakeup(priv->device)) { if (device_may_wakeup(priv->device)) {
priv->hw->mac->pmt(priv->ioaddr, 0); priv->hw->mac->pmt(priv->hw, 0);
priv->irq_wake = 0; priv->irq_wake = 0;
} else { } else {
pinctrl_pm_select_default_state(priv->device); pinctrl_pm_select_default_state(priv->device);