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[PATCH] powerpc: Updated platforms that use gianfar to match driver

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The gianfar driver changed how it required MDIO bus and phy id's
to be passed to it.  Also, it no longer passes the physical address
of the MDIO bus.  Instead we have a proper platform device.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Kumar Gala 2006-01-12 21:04:23 -06:00 committed by Paul Mackerras
parent 135f0b17a7
commit 7e78e5e502
9 changed files with 52 additions and 55 deletions
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10
arch/ppc/platforms/83xx/mpc834x_sys.c
View File

@ -51,9 +51,6 @@
#include <syslib/ppc83xx_setup.h>
static const char *GFAR_PHY_0 = "phy0:0";
static const char *GFAR_PHY_1 = "phy0:1";
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
@ -129,20 +126,21 @@ mpc834x_sys_setup_arch(void)
mdata->irq[1] = MPC83xx_IRQ_EXT2;
mdata->irq[2] = -1;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_0;
pdata->bus_id = 0;
pdata->phy_id = 0;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_1;
pdata->bus_id = 0;
pdata->phy_id = 1;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}

14
arch/ppc/platforms/85xx/mpc8540_ads.c
View File

@ -52,10 +52,6 @@
#include <syslib/ppc85xx_setup.h>
static const char *GFAR_PHY_0 = "phy0:0";
static const char *GFAR_PHY_1 = "phy0:1";
static const char *GFAR_PHY_3 = "phy0:3";
/* ************************************************************************
*
* Setup the architecture
@ -102,27 +98,29 @@ mpc8540ads_setup_arch(void)
mdata->irq[2] = -1;
mdata->irq[3] = MPC85xx_IRQ_EXT5;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_0;
pdata->bus_id = 0;
pdata->phy_id = 0;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_1;
pdata->bus_id = 0;
pdata->phy_id = 1;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
if (pdata) {
pdata->board_flags = 0;
pdata->bus_id = GFAR_PHY_3;
pdata->bus_id = 0;
pdata->phy_id = 3;
memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
}

11
arch/ppc/platforms/85xx/mpc8560_ads.c
View File

@ -56,10 +56,6 @@
#include <syslib/ppc85xx_setup.h>
static const char *GFAR_PHY_0 = "phy0:0";
static const char *GFAR_PHY_1 = "phy0:1";
static const char *GFAR_PHY_3 = "phy0:3";
/* ************************************************************************
*
* Setup the architecture
@ -99,20 +95,21 @@ mpc8560ads_setup_arch(void)
mdata->irq[2] = -1;
mdata->irq[3] = MPC85xx_IRQ_EXT5;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_0;
pdata->bus_id = 0;
pdata->phy_id = 0;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_1;
pdata->bus_id = 0;
pdata->phy_id = 1;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}

16
arch/ppc/platforms/85xx/mpc85xx_cds_common.c
View File

@ -395,9 +395,6 @@ mpc85xx_cds_pcibios_fixup(void)
TODC_ALLOC();
static const char *GFAR_PHY_0 = "phy0:0";
static const char *GFAR_PHY_1 = "phy0:1";
/* ************************************************************************
*
* Setup the architecture
@ -461,34 +458,37 @@ mpc85xx_cds_setup_arch(void)
mdata->irq[2] = -1;
mdata->irq[3] = -1;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_0;
pdata->bus_id = 0;
pdata->phy_id = 0;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_1;
pdata->bus_id = 0;
pdata->phy_id = 1;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_0;
pdata->bus_id = 0;
pdata->phy_id = 0;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_1;
pdata->bus_id = 0;
pdata->phy_id = 1;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}

10
arch/ppc/platforms/85xx/sbc8560.c
View File

@ -91,9 +91,6 @@ sbc8560_early_serial_map(void)
}
#endif
static const char *GFAR_PHY_25 = "phy0:25";
static const char *GFAR_PHY_26 = "phy0:26";
/* ************************************************************************
*
* Setup the architecture
@ -136,20 +133,21 @@ sbc8560_setup_arch(void)
mdata->irq[25] = MPC85xx_IRQ_EXT6;
mdata->irq[26] = MPC85xx_IRQ_EXT7;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_25;
pdata->bus_id = 0;
pdata->phy_id = 25;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_26;
pdata->bus_id = 0;
pdata->phy_id = 26;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}

10
arch/ppc/platforms/85xx/stx_gp3.c
View File

@ -93,9 +93,6 @@ static u8 gp3_openpic_initsenses[] __initdata = {
0x0, /* External 11: */
};
static const char *GFAR_PHY_2 = "phy0:2";
static const char *GFAR_PHY_4 = "phy0:4";
/*
* Setup the architecture
*/
@ -130,20 +127,21 @@ gp3_setup_arch(void)
mdata->irq[2] = MPC85xx_IRQ_EXT5;
mdata->irq[4] = MPC85xx_IRQ_EXT5;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (pdata) {
/* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
pdata->bus_id = GFAR_PHY_2;
pdata->bus_id = 0;
pdata->phy_id = 2;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
if (pdata) {
/* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
pdata->bus_id = GFAR_PHY_4;
pdata->bus_id = 0;
pdata->phy_id = 4;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}

16
arch/ppc/platforms/85xx/tqm85xx.c
View File

@ -91,12 +91,6 @@ static u_char tqm85xx_openpic_initsenses[] __initdata = {
0x0, /* External 11: */
};
static const char *GFAR_PHY_0 = "phy0:2";
static const char *GFAR_PHY_1 = "phy0:1";
#ifdef CONFIG_MPC8540
static const char *GFAR_PHY_3 = "phy0:3";
#endif
/* ************************************************************************
*
* Setup the architecture
@ -149,20 +143,21 @@ tqm85xx_setup_arch(void)
mdata->irq[2] = -1;
mdata->irq[3] = MPC85xx_IRQ_EXT8;
mdata->irq[31] = -1;
mdata->paddr += binfo->bi_immr_base;
/* setup the board related information for the enet controllers */
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_0;
pdata->bus_id = 0;
pdata->phy_id = 2;
memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
}
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
if (pdata) {
pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
pdata->bus_id = GFAR_PHY_1;
pdata->bus_id = 0;
pdata->phy_id = 1;
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}
@ -170,7 +165,8 @@ tqm85xx_setup_arch(void)
pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
if (pdata) {
pdata->board_flags = 0;
pdata->bus_id = GFAR_PHY_3;
pdata->bus_id = 0;
pdata->phy_id = 3;
memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
}
#endif

10
arch/ppc/syslib/mpc83xx_devices.c
View File

@ -28,7 +28,6 @@
*/
struct gianfar_mdio_data mpc83xx_mdio_pdata = {
.paddr = 0x24520,
};
static struct gianfar_platform_data mpc83xx_tsec1_pdata = {
@ -226,7 +225,14 @@ struct platform_device ppc_sys_platform_devices[] = {
.name = "fsl-gianfar_mdio",
.id = 0,
.dev.platform_data = &mpc83xx_mdio_pdata,
.num_resources = 0,
.num_resources = 1,
.resource = (struct resource[]) {
{
.start = 0x24520,
.end = 0x2453f,
.flags = IORESOURCE_MEM,
},
},
},
};

10
arch/ppc/syslib/mpc85xx_devices.c
View File

@ -26,7 +26,6 @@
* what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
*/
struct gianfar_mdio_data mpc85xx_mdio_pdata = {
.paddr = MPC85xx_MIIM_OFFSET,
};
static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
@ -720,7 +719,14 @@ struct platform_device ppc_sys_platform_devices[] = {
.name = "fsl-gianfar_mdio",
.id = 0,
.dev.platform_data = &mpc85xx_mdio_pdata,
.num_resources = 0,
.num_resources = 1,
.resource = (struct resource[]) {
{
.start = 0x24520,
.end = 0x2453f,
.flags = IORESOURCE_MEM,
},
},
},
};