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phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanup

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commit 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module
present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in
wiz. However during cleanup, it removed only the MUX clock provider.
Remove the DIVIDER clock provider here.

Fixes: 091876cc35 ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210310120840.16447-3-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Kishon Vijay Abraham I 2021-03-10 17:38:36 +05:30 committed by Vinod Koul
parent 549cb1ae3e
commit 7e52a39f19
1 changed files with 6 additions and 0 deletions
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6
drivers/phy/ti/phy-j721e-wiz.c
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@ -608,6 +608,12 @@ static void wiz_clock_cleanup(struct wiz *wiz, struct device_node *node)
of_clk_del_provider(clk_node);
of_node_put(clk_node);
}
for (i = 0; i < wiz->clk_div_sel_num; i++) {
clk_node = of_get_child_by_name(node, clk_div_sel[i].node_name);
of_clk_del_provider(clk_node);
of_node_put(clk_node);
}
}
static int wiz_clock_init(struct wiz *wiz, struct device_node *node)