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powerpc/feature: Remove CPU_FTR_NODSISRALIGN
CPU_FTR_NODSISRALIGN has not been used since
commit 31bfdb036f
("powerpc: Use instruction emulation
infrastructure to handle alignment faults")
Remove it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/05d98136b24bbf11525445414bb18cffe2724f48.1602587470.git.christophe.leroy@csgroup.eu
This commit is contained in:
parent
0e8ff4f8d2
commit
7d47034551
@ -137,7 +137,7 @@ static inline void cpu_feature_keys_init(void) { }
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#define CPU_FTR_DBELL ASM_CONST(0x00000004)
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#define CPU_FTR_CAN_NAP ASM_CONST(0x00000008)
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#define CPU_FTR_DEBUG_LVL_EXC ASM_CONST(0x00000010)
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#define CPU_FTR_NODSISRALIGN ASM_CONST(0x00000020)
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// ASM_CONST(0x00000020) Free
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#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x00000040)
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#define CPU_FTR_LWSYNC ASM_CONST(0x00000080)
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#define CPU_FTR_NOEXECUTE ASM_CONST(0x00000100)
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@ -219,7 +219,7 @@ static inline void cpu_feature_keys_init(void) { }
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#ifndef __ASSEMBLY__
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#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN)
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#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_NOEXECUTE)
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/* We only set the altivec features if the kernel was compiled with altivec
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* support
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@ -376,33 +376,33 @@ static inline void cpu_feature_keys_init(void) { }
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CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE | CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON)
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#define CPU_FTRS_8XX (CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_40X (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_44X (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_440x6 (CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE | \
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#define CPU_FTRS_40X (CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_44X (CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_440x6 (CPU_FTR_NOEXECUTE | \
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CPU_FTR_INDEXED_DCR)
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#define CPU_FTRS_47X (CPU_FTRS_440x6)
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#define CPU_FTRS_E200 (CPU_FTR_SPE_COMP | \
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CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
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CPU_FTR_COHERENT_ICACHE | \
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CPU_FTR_NOEXECUTE | \
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CPU_FTR_DEBUG_LVL_EXC)
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#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | \
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CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
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CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
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CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | \
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CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
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CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_E500MC (CPU_FTR_NODSISRALIGN | \
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CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_E500MC ( \
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CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
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/*
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* e5500/e6500 erratum A-006958 is a timebase bug that can use the
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* same workaround as CPU_FTR_CELL_TB_BUG.
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*/
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#define CPU_FTRS_E5500 (CPU_FTR_NODSISRALIGN | \
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#define CPU_FTRS_E5500 ( \
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CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_CELL_TB_BUG)
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#define CPU_FTRS_E6500 (CPU_FTR_NODSISRALIGN | \
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#define CPU_FTRS_E6500 ( \
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CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV | CPU_FTR_ALTIVEC_COMP | \
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@ -552,7 +552,6 @@ enum {
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#define CPU_FTRS_DT_CPU_BASE \
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(CPU_FTR_LWSYNC | \
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CPU_FTR_FPU_UNAVAILABLE | \
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CPU_FTR_NODSISRALIGN | \
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CPU_FTR_NOEXECUTE | \
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CPU_FTR_COHERENT_ICACHE | \
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CPU_FTR_STCX_CHECKS_ADDRESS | \
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@ -273,13 +273,6 @@ static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
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return 1;
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}
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static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
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{
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cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
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return 1;
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}
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static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
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{
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u64 lpcr;
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@ -642,7 +635,7 @@ static struct dt_cpu_feature_match __initdata
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{"tm-suspend-hypervisor-assist", feat_enable, CPU_FTR_P9_TM_HV_ASSIST},
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{"tm-suspend-xer-so-bug", feat_enable, CPU_FTR_P9_TM_XER_SO_BUG},
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{"idle-nap", feat_enable_idle_nap, 0},
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{"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
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/* alignment-interrupt-dsisr ignored */
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{"idle-stop", feat_enable_idle_stop, 0},
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{"machine-check-power8", feat_enable_mce_power8, 0},
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{"performance-monitor-power8", feat_enable_pmu_power8, 0},
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@ -165,7 +165,6 @@ static struct ibm_pa_feature {
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#ifdef CONFIG_PPC_RADIX_MMU
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{ .pabyte = 40, .pabit = 0, .mmu_features = MMU_FTR_TYPE_RADIX | MMU_FTR_GTSE },
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#endif
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{ .pabyte = 1, .pabit = 1, .invert = 1, .cpu_features = CPU_FTR_NODSISRALIGN },
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{ .pabyte = 5, .pabit = 0, .cpu_features = CPU_FTR_REAL_LE,
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.cpu_user_ftrs = PPC_FEATURE_TRUE_LE },
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/*
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