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drm/radeon: add Mullins dpm support.
Generic dpm support similar to Kabini. Mullins specific features will be worked on later. Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com>
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@ -639,7 +639,7 @@ static int kv_force_lowest_valid(struct radeon_device *rdev)
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static int kv_unforce_levels(struct radeon_device *rdev)
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{
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if (rdev->family == CHIP_KABINI)
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
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return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel);
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else
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return kv_set_enabled_levels(rdev);
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@ -1617,7 +1617,7 @@ static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate)
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if (pi->acp_power_gated == gate)
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return;
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if (rdev->family == CHIP_KABINI)
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
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return;
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pi->acp_power_gated = gate;
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@ -1786,7 +1786,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
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}
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}
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if (rdev->family == CHIP_KABINI) {
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
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if (pi->enable_dpm) {
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kv_set_valid_clock_range(rdev, new_ps);
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kv_update_dfs_bypass_settings(rdev, new_ps);
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@ -1862,7 +1862,7 @@ void kv_dpm_reset_asic(struct radeon_device *rdev)
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{
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struct kv_power_info *pi = kv_get_pi(rdev);
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if (rdev->family == CHIP_KABINI) {
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
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kv_force_lowest_valid(rdev);
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kv_init_graphics_levels(rdev);
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kv_program_bootup_state(rdev);
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@ -1941,7 +1941,7 @@ static int kv_force_dpm_highest(struct radeon_device *rdev)
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break;
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}
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if (rdev->family == CHIP_KABINI)
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
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return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i);
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else
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return kv_set_enabled_level(rdev, i);
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@ -1961,7 +1961,7 @@ static int kv_force_dpm_lowest(struct radeon_device *rdev)
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break;
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}
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if (rdev->family == CHIP_KABINI)
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
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return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i);
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else
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return kv_set_enabled_level(rdev, i);
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@ -2118,7 +2118,7 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev,
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else
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pi->battery_state = false;
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if (rdev->family == CHIP_KABINI) {
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
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ps->dpm0_pg_nb_ps_lo = 0x1;
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ps->dpm0_pg_nb_ps_hi = 0x0;
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ps->dpmx_nb_ps_lo = 0x1;
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@ -2179,7 +2179,7 @@ static int kv_calculate_nbps_level_settings(struct radeon_device *rdev)
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if (pi->lowest_valid > pi->highest_valid)
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return -EINVAL;
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if (rdev->family == CHIP_KABINI) {
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {
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for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {
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pi->graphics_level[i].GnbSlow = 1;
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pi->graphics_level[i].ForceNbPs1 = 0;
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@ -2324,7 +2324,7 @@ static void kv_program_nbps_index_settings(struct radeon_device *rdev,
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struct kv_power_info *pi = kv_get_pi(rdev);
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u32 nbdpmconfig1;
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if (rdev->family == CHIP_KABINI)
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
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return;
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if (pi->sys_info.nb_dpm_enable) {
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@ -2631,7 +2631,7 @@ int kv_dpm_init(struct radeon_device *rdev)
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pi->sram_end = SMC_RAM_END;
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if (rdev->family == CHIP_KABINI)
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if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
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pi->high_voltage_t = 4001;
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pi->enable_nb_dpm = true;
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@ -1300,6 +1300,7 @@ int radeon_pm_init(struct radeon_device *rdev)
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case CHIP_KABINI:
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case CHIP_KAVERI:
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case CHIP_HAWAII:
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case CHIP_MULLINS:
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/* DPM requires the RLC, RV770+ dGPU requires SMC */
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if (!rdev->rlc_fw)
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rdev->pm.pm_method = PM_METHOD_PROFILE;
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