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video: fbdev: Replace HTTP links with HTTPS ones
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200719203714.61745-1-grandmaster@al2klimov.de
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@ -127,7 +127,7 @@ At least on the EP9315 there is a silicon bug which causes bit 27 of
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the VIDSCRNPAGE (framebuffer physical offset) to be tied low. There is
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the VIDSCRNPAGE (framebuffer physical offset) to be tied low. There is
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an unofficial errata for this bug at::
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an unofficial errata for this bug at::
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http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
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https://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
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By default the EP93xx framebuffer driver checks if the allocated physical
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By default the EP93xx framebuffer driver checks if the allocated physical
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address has bit 27 set. If it does, then the memory is freed and an
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address has bit 27 set. If it does, then the memory is freed and an
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@ -824,7 +824,7 @@ config FB_OPENCORES
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systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs.
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systems (e.g. Altera socfpga or Xilinx Zynq) on FPGAs.
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The source code and specification for the core is available at
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The source code and specification for the core is available at
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<http://opencores.org/project,vga_lcd>
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<https://opencores.org/project,vga_lcd>
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config FB_S1D13XXX
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config FB_S1D13XXX
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tristate "Epson S1D13XXX framebuffer support"
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tristate "Epson S1D13XXX framebuffer support"
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@ -835,7 +835,7 @@ config FB_S1D13XXX
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help
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help
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Support for S1D13XXX framebuffer device family (currently only
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Support for S1D13XXX framebuffer device family (currently only
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working with S1D13806). Product specs at
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working with S1D13806). Product specs at
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<http://vdc.epson.com/>
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<https://vdc.epson.com/>
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config FB_ATMEL
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config FB_ATMEL
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tristate "AT91 LCD Controller support"
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tristate "AT91 LCD Controller support"
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@ -1193,7 +1193,7 @@ config FB_RADEON
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don't need to choose this to run the Radeon in plain VGA mode.
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don't need to choose this to run the Radeon in plain VGA mode.
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There is a product page at
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There is a product page at
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http://products.amd.com/en-us/GraphicCardResult.aspx
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https://products.amd.com/en-us/GraphicCardResult.aspx
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config FB_RADEON_I2C
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config FB_RADEON_I2C
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bool "DDC/I2C for ATI Radeon support"
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bool "DDC/I2C for ATI Radeon support"
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@ -1361,7 +1361,7 @@ config FB_SIS
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help
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help
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This is the frame buffer device driver for the SiS 300, 315, 330
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This is the frame buffer device driver for the SiS 300, 315, 330
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and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
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and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
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Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
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Specs available at <https://www.sis.com> and <http://www.xgitech.com>.
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To compile this driver as a module, choose M here; the module
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To compile this driver as a module, choose M here; the module
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will be called sisfb.
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will be called sisfb.
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@ -19,7 +19,7 @@
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* Generalized Timing Formula is derived from:
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* Generalized Timing Formula is derived from:
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*
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*
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* GTF Spreadsheet by Andy Morrish (1/5/97)
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* GTF Spreadsheet by Andy Morrish (1/5/97)
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* available at http://www.vesa.org
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* available at https://www.vesa.org
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*
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* License. See the file COPYING in the main directory of this archive
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@ -1201,7 +1201,7 @@ static void fb_timings_dclk(struct __fb_timings *timings)
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* ignored and @var will be filled with the calculated timings.
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* ignored and @var will be filled with the calculated timings.
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*
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*
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* All calculations are based on the VESA GTF Spreadsheet
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* All calculations are based on the VESA GTF Spreadsheet
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* available at VESA's public ftp (http://www.vesa.org).
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* available at VESA's public ftp (https://www.vesa.org).
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*
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*
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* NOTES:
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* NOTES:
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* The timings generated by the GTF will be different from VESA
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* The timings generated by the GTF will be different from VESA
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@ -430,7 +430,7 @@ static int ep93xxfb_alloc_videomem(struct fb_info *info)
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/*
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/*
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* There is a bug in the ep93xx framebuffer which causes problems
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* There is a bug in the ep93xx framebuffer which causes problems
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* if bit 27 of the physical address is set.
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* if bit 27 of the physical address is set.
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* See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
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* See: https://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
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* There does not seem to be any official errata for this, but I
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* There does not seem to be any official errata for this, but I
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* have confirmed the problem exists on my hardware (ep9315) at
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* have confirmed the problem exists on my hardware (ep9315) at
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* least.
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* least.
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@ -5,7 +5,7 @@
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* 2011 (c) Aeroflex Gaisler AB
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* 2011 (c) Aeroflex Gaisler AB
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*
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*
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* Full documentation of the core can be found here:
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* Full documentation of the core can be found here:
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* http://www.gaisler.com/products/grlib/grip.pdf
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* https://www.gaisler.com/products/grlib/grip.pdf
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*
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*
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* Contributors: Kristoffer Glembo <kristoffer@gaisler.com>
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* Contributors: Kristoffer Glembo <kristoffer@gaisler.com>
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*/
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*/
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@ -478,7 +478,7 @@ static int macfb_setcolreg(unsigned regno, unsigned red, unsigned green,
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break;
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break;
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/*
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/*
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* 24-bit colour almost doesn't exist on 68k Macs --
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* 24-bit colour almost doesn't exist on 68k Macs --
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* http://support.apple.com/kb/TA28634 (Old Article: 10992)
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* https://support.apple.com/kb/TA28634 (Old Article: 10992)
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*/
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*/
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case 24:
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case 24:
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case 32:
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case 32:
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@ -10,7 +10,7 @@
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* Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
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* Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
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*
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*
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* This work was made possible by help and equipment support from E-Ink
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* This work was made possible by help and equipment support from E-Ink
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* Corporation. http://www.eink.com/
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* Corporation. https://www.eink.com/
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*
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*
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* This driver is written to be used with the Metronome display controller.
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* This driver is written to be used with the Metronome display controller.
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* It is intended to be architecture independent. A board specific driver
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* It is intended to be architecture independent. A board specific driver
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@ -60,7 +60,7 @@ config FB_OMAP5_DSS_HDMI
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select FB_OMAP2_DSS_HDMI_COMMON
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select FB_OMAP2_DSS_HDMI_COMMON
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help
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help
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HDMI Interface for OMAP5 and similar cores. This adds the High
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HDMI Interface for OMAP5 and similar cores. This adds the High
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Definition Multimedia Interface. See http://www.hdmi.org/ for HDMI
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Definition Multimedia Interface. See https://www.hdmi.org/ for HDMI
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specification.
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specification.
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config FB_OMAP2_DSS_SDI
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config FB_OMAP2_DSS_SDI
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@ -79,7 +79,7 @@ config FB_OMAP2_DSS_DSI
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DSI is a high speed half-duplex serial interface between the host
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DSI is a high speed half-duplex serial interface between the host
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processor and a peripheral, such as a display or a framebuffer chip.
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processor and a peripheral, such as a display or a framebuffer chip.
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See http://www.mipi.org/ for DSI specifications.
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See https://www.mipi.org/ for DSI specifications.
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config FB_OMAP2_DSS_MIN_FCK_PER_PCK
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config FB_OMAP2_DSS_MIN_FCK_PER_PCK
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int "Minimum FCK/PCK ratio (for scaling)"
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int "Minimum FCK/PCK ratio (for scaling)"
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@ -2,7 +2,7 @@
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/*
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/*
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* HDMI driver definition for TI OMAP4 Processor.
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* HDMI driver definition for TI OMAP4 Processor.
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*
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*
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
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*/
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*/
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#ifndef _HDMI_H
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#ifndef _HDMI_H
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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/*
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* HDMI interface DSS driver for TI's OMAP4 family of SoCs.
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* HDMI interface DSS driver for TI's OMAP4 family of SoCs.
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
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* Authors: Yong Zhi
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* Authors: Yong Zhi
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* Mythri pk <mythripk@ti.com>
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* Mythri pk <mythripk@ti.com>
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*/
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*/
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@ -3,7 +3,7 @@
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* ti_hdmi_4xxx_ip.c
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* ti_hdmi_4xxx_ip.c
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*
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*
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* HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library
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* HDMI TI81xx, TI38xx, TI OMAP4 etc IP driver Library
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
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* Authors: Yong Zhi
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* Authors: Yong Zhi
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* Mythri pk <mythripk@ti.com>
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* Mythri pk <mythripk@ti.com>
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*/
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*/
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@ -2,7 +2,7 @@
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/*
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/*
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* HDMI header definition for OMAP4 HDMI core IP
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* HDMI header definition for OMAP4 HDMI core IP
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*
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*
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
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* Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com/
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*/
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*/
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#ifndef _HDMI4_CORE_H_
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#ifndef _HDMI4_CORE_H_
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@ -2,7 +2,7 @@
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/*
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/*
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* HDMI driver definition for TI OMAP5 processors.
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* HDMI driver definition for TI OMAP5 processors.
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*
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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*/
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#ifndef _HDMI5_CORE_H_
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#ifndef _HDMI5_CORE_H_
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@ -18,7 +18,7 @@
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* Clean patches should be sent to the ARM Linux Patch System. Please see the
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* Clean patches should be sent to the ARM Linux Patch System. Please see the
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* following web page for more information:
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* following web page for more information:
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*
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*
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* http://www.arm.linux.org.uk/developer/patches/info.shtml
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* https://www.arm.linux.org.uk/developer/patches/info.shtml
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*
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*
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* Thank you.
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* Thank you.
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*
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*
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