ACPICA: CXL 2.0: CEDT: Add new CEDT table

ACPICA commit 0b03aa8ebd7a5b2b9407893f123ee587af45926f

This sets up all of the boilerplate without actually doing anything.

Link: https://github.com/acpica/acpica/commit/0b03aa8e
Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Erik Kaneda <erik.kaneda@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Ben Widawsky 2021-04-06 14:30:20 -07:00 committed by Rafael J. Wysocki
parent 582252034d
commit 7c5eab72f5

View File

@ -28,6 +28,7 @@
#define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
#define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
#define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */
#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
@ -301,6 +302,48 @@ struct acpi_table_boot {
u8 reserved[3];
};
/*******************************************************************************
*
* CEDT - CXL Early Discovery Table
* Version 1
*
* Conforms to the "CXL Early Discovery Table" (CXL 2.0)
*
******************************************************************************/
struct acpi_table_cedt {
struct acpi_table_header header; /* Common ACPI table header */
};
/* CEDT subtable header (Performance Record Structure) */
struct acpi_cedt_header {
u8 type;
u8 reserved;
u16 length;
};
/* Values for Type field above */
enum acpi_cedt_type {
ACPI_CEDT_TYPE_CHBS = 0,
};
/*
* CEDT subtables
*/
/* 0: CXL Host Bridge Structure */
struct acpi_cedt_chbs {
ACPI_CEDT_HEADER header;
u32 uid;
u32 cxl_version;
u32 reserved;
u64 base;
u64 length;
};
/*******************************************************************************
*
* CPEP - Corrected Platform Error Polling table (ACPI 4.0)