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clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset

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Datasheet specified that parent MUX settings are at bits [10:8],
but current implementation specifies incorrect offset at [10:12].
Fix this.

Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Ondrej Jirman 2017-10-05 04:33:14 +02:00 committed by Maxime Ripard
parent 7f3ed79188
commit 7c4f63ec94
1 changed files with 1 additions and 1 deletions
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drivers/clk/sunxi-ng/ccu-sun8i-a83t.c
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@ -506,7 +506,7 @@ static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(csi_mclk_clk, "csi-mclk",
csi_mclk_parents, csi_mclk_table, csi_mclk_parents, csi_mclk_table,
0x134, 0x134,
0, 5, /* M */ 0, 5, /* M */
10, 3, /* mux */ 8, 3, /* mux */
BIT(15), /* gate */ BIT(15), /* gate */
0); 0);