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Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze
* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix out_le32() macro microblaze: Fix cache loop function for cache range
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commit
7b1f94b8a6
@ -217,7 +217,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size,
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* Little endian
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*/
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#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a));
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#define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
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#define out_le16(a, v) __raw_writew(__cpu_to_le16(v), (a))
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#define in_le32(a) __le32_to_cpu(__raw_readl(a))
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@ -172,16 +172,15 @@ do { \
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/* It is used only first parameter for OP - for wic, wdc */
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#define CACHE_RANGE_LOOP_1(start, end, line_length, op) \
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do { \
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int step = -line_length; \
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int count = end - start; \
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BUG_ON(count <= 0); \
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int volatile temp; \
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BUG_ON(end - start <= 0); \
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\
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__asm__ __volatile__ (" 1: addk %0, %0, %1; \
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" #op " %0, r0; \
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bgtid %1, 1b; \
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addk %1, %1, %2; \
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" : : "r" (start), "r" (count), \
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"r" (step) : "memory"); \
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__asm__ __volatile__ (" 1: " #op " %1, r0; \
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cmpu %0, %1, %2; \
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bgtid %0, 1b; \
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addk %1, %1, %3; \
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" : : "r" (temp), "r" (start), "r" (end),\
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"r" (line_length) : "memory"); \
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} while (0);
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static void __flush_icache_range_msr_irq(unsigned long start, unsigned long end)
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@ -313,16 +312,6 @@ static void __invalidate_dcache_all_wb(void)
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pr_debug("%s\n", __func__);
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CACHE_ALL_LOOP2(cpuinfo.dcache_size, cpuinfo.dcache_line_length,
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wdc.clear)
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#if 0
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unsigned int i;
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pr_debug("%s\n", __func__);
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/* Just loop through cache size and invalidate it */
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for (i = 0; i < cpuinfo.dcache_size; i += cpuinfo.dcache_line_length)
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__invalidate_dcache(0, i);
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#endif
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}
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static void __invalidate_dcache_range_wb(unsigned long start,
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