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dmaengine fixes for 4.14-rc5
Here are fixes for this round - fix spinlock usage amd fifo response for altera driver - fix ti crossbar race condition - fix edma memcpy align -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJZ4nVCAAoJEHwUBw8lI4NH85UQAIdhLBxuJ4Np6VITMzKt0d0g xch/lPJKTRC9gQWrHXIiOeRmA4NXpqNfHxhuj1qcOlJzt1Jgf+QxH6WF3QBj1EZX 3Z2OPYXknF/5SPG6Ovwvf9LADGUq/l8SQoVwFsnRLXPw00S/+yIc7sNBdLqQgdpM kdFGy4ZvqE+jYzzUPIJWCUG8AdvYRGhT0Hcbt8dTV5u6XaRd4hIcbGqUqSadIclx yuWrQilEhzNqbwUZpBzLKZZfZmA7+8VUUrmL1ONJ1/8hrASo8GWSxpj4+RzbUPzH 57VNUCAF1Z3yW4nd9QDE0LTs8jHestYIK8bfa0RW0tDWgwXdnqOsJfXsRgCk6bFc envCn5d3ws0i0+7GrDL6dbstHdP9m6XejKSQMUNrZ6vunsPYrrmuelwobaoRfmWN BMM6ShwpsKKrzK3FvCuNcqehSBSjKJR00nciqn2XTyUtPv2UOPy/cAn4+po6MW+U HPgzjq10VOsA6jdpJhoU1c6gDRWTRDuEVeKIALwTyqXKs9Q2Fl73vifAlhDy0nCu r5/YPmCEbt3lmku4STUPUqokmAx7NC7zZGcFscTO2ly8wRydMwxP1pJ3Vz4edaF+ JNkZqdge9j8AxgnFjT3eGabjHPpGogBqgph/m4VQIC14rETttPVYEL4ILNk3Gd55 Fx5xvJCvZznmzmExHsXt =d2EB -----END PGP SIGNATURE----- Merge tag 'dmaengine-fix-4.14-rc5' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine fixes from Vinod Koul: "Here are fixes for this round - fix spinlock usage amd fifo response for altera driver - fix ti crossbar race condition - fix edma memcpy align" * tag 'dmaengine-fix-4.14-rc5' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: altera: fix spinlock usage dmaengine: altera: fix response FIFO emptying dmaengine: ti-dma-crossbar: Fix possible race condition with dma_inuse dmaengine: edma: Align the memcpy acnt array size with the transfer
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commit
7a23c5abb9
@ -212,11 +212,12 @@ struct msgdma_device {
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static struct msgdma_sw_desc *msgdma_get_descriptor(struct msgdma_device *mdev)
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{
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struct msgdma_sw_desc *desc;
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unsigned long flags;
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spin_lock_bh(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, flags);
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desc = list_first_entry(&mdev->free_list, struct msgdma_sw_desc, node);
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list_del(&desc->node);
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spin_unlock_bh(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, flags);
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INIT_LIST_HEAD(&desc->tx_list);
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@ -306,13 +307,14 @@ static dma_cookie_t msgdma_tx_submit(struct dma_async_tx_descriptor *tx)
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struct msgdma_device *mdev = to_mdev(tx->chan);
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struct msgdma_sw_desc *new;
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dma_cookie_t cookie;
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unsigned long flags;
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new = tx_to_desc(tx);
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spin_lock_bh(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, flags);
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cookie = dma_cookie_assign(tx);
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list_add_tail(&new->node, &mdev->pending_list);
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spin_unlock_bh(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, flags);
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return cookie;
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}
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@ -336,17 +338,18 @@ msgdma_prep_memcpy(struct dma_chan *dchan, dma_addr_t dma_dst,
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struct msgdma_extended_desc *desc;
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size_t copy;
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u32 desc_cnt;
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unsigned long irqflags;
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desc_cnt = DIV_ROUND_UP(len, MSGDMA_MAX_TRANS_LEN);
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spin_lock_bh(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, irqflags);
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if (desc_cnt > mdev->desc_free_cnt) {
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spin_unlock_bh(&mdev->lock);
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dev_dbg(mdev->dev, "mdev %p descs are not available\n", mdev);
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return NULL;
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}
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mdev->desc_free_cnt -= desc_cnt;
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spin_unlock_bh(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, irqflags);
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do {
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/* Allocate and populate the descriptor */
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@ -397,18 +400,19 @@ msgdma_prep_slave_sg(struct dma_chan *dchan, struct scatterlist *sgl,
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u32 desc_cnt = 0, i;
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struct scatterlist *sg;
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u32 stride;
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unsigned long irqflags;
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for_each_sg(sgl, sg, sg_len, i)
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desc_cnt += DIV_ROUND_UP(sg_dma_len(sg), MSGDMA_MAX_TRANS_LEN);
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spin_lock_bh(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, irqflags);
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if (desc_cnt > mdev->desc_free_cnt) {
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spin_unlock_bh(&mdev->lock);
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dev_dbg(mdev->dev, "mdev %p descs are not available\n", mdev);
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return NULL;
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}
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mdev->desc_free_cnt -= desc_cnt;
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spin_unlock_bh(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, irqflags);
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avail = sg_dma_len(sgl);
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@ -566,10 +570,11 @@ static void msgdma_start_transfer(struct msgdma_device *mdev)
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static void msgdma_issue_pending(struct dma_chan *chan)
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{
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struct msgdma_device *mdev = to_mdev(chan);
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unsigned long flags;
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spin_lock_bh(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, flags);
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msgdma_start_transfer(mdev);
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spin_unlock_bh(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, flags);
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}
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/**
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@ -634,10 +639,11 @@ static void msgdma_free_descriptors(struct msgdma_device *mdev)
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static void msgdma_free_chan_resources(struct dma_chan *dchan)
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{
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struct msgdma_device *mdev = to_mdev(dchan);
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unsigned long flags;
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spin_lock_bh(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, flags);
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msgdma_free_descriptors(mdev);
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spin_unlock_bh(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, flags);
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kfree(mdev->sw_desq);
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}
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@ -682,8 +688,9 @@ static void msgdma_tasklet(unsigned long data)
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u32 count;
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u32 __maybe_unused size;
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u32 __maybe_unused status;
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unsigned long flags;
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spin_lock(&mdev->lock);
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spin_lock_irqsave(&mdev->lock, flags);
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/* Read number of responses that are available */
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count = ioread32(mdev->csr + MSGDMA_CSR_RESP_FILL_LEVEL);
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@ -698,13 +705,13 @@ static void msgdma_tasklet(unsigned long data)
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* bits. So we need to just drop these values.
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*/
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size = ioread32(mdev->resp + MSGDMA_RESP_BYTES_TRANSFERRED);
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status = ioread32(mdev->resp - MSGDMA_RESP_STATUS);
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status = ioread32(mdev->resp + MSGDMA_RESP_STATUS);
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msgdma_complete_descriptor(mdev);
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msgdma_chan_desc_cleanup(mdev);
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}
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spin_unlock(&mdev->lock);
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spin_unlock_irqrestore(&mdev->lock, flags);
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}
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/**
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@ -1143,11 +1143,24 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
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struct edma_desc *edesc;
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struct device *dev = chan->device->dev;
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struct edma_chan *echan = to_edma_chan(chan);
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unsigned int width, pset_len;
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unsigned int width, pset_len, array_size;
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if (unlikely(!echan || !len))
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return NULL;
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/* Align the array size (acnt block) with the transfer properties */
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switch (__ffs((src | dest | len))) {
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case 0:
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array_size = SZ_32K - 1;
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break;
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case 1:
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array_size = SZ_32K - 2;
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break;
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default:
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array_size = SZ_32K - 4;
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break;
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}
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if (len < SZ_64K) {
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/*
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* Transfer size less than 64K can be handled with one paRAM
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@ -1169,7 +1182,7 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
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* When the full_length is multibple of 32767 one slot can be
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* used to complete the transfer.
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*/
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width = SZ_32K - 1;
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width = array_size;
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pset_len = rounddown(len, width);
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/* One slot is enough for lengths multiple of (SZ_32K -1) */
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if (unlikely(pset_len == len))
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@ -1217,7 +1230,7 @@ static struct dma_async_tx_descriptor *edma_prep_dma_memcpy(
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}
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dest += pset_len;
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src += pset_len;
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pset_len = width = len % (SZ_32K - 1);
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pset_len = width = len % array_size;
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ret = edma_config_pset(chan, &edesc->pset[1], src, dest, 1,
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width, pset_len, DMA_MEM_TO_MEM);
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@ -262,13 +262,14 @@ static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec,
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mutex_lock(&xbar->mutex);
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map->xbar_out = find_first_zero_bit(xbar->dma_inuse,
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xbar->dma_requests);
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mutex_unlock(&xbar->mutex);
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if (map->xbar_out == xbar->dma_requests) {
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mutex_unlock(&xbar->mutex);
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dev_err(&pdev->dev, "Run out of free DMA requests\n");
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kfree(map);
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return ERR_PTR(-ENOMEM);
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}
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set_bit(map->xbar_out, xbar->dma_inuse);
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mutex_unlock(&xbar->mutex);
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map->xbar_in = (u16)dma_spec->args[0];
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