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drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs
Use the infrastructure added in a previous patch to choose shared DPLLs and calculate clocks before touching the hardware. v2: Don't set mode_set hooks since dev_priv is kzalloc()'d (Ville) Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -842,8 +842,6 @@ bool intel_ddi_pll_select(struct intel_crtc *intel_crtc)
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intel_ddi_get_crtc_new_encoder(intel_crtc);
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int clock = intel_crtc->new_config->port_clock;
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intel_put_shared_dpll(intel_crtc);
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return hsw_ddi_pll_select(intel_crtc, intel_encoder, clock);
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}
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@ -7975,9 +7975,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
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modeset_update_crtc_power_domains(dev);
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}
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static int haswell_crtc_mode_set(struct intel_crtc *crtc,
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int x, int y,
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struct drm_framebuffer *fb)
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static int haswell_crtc_compute_clock(struct intel_crtc *crtc)
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{
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if (!intel_ddi_pll_select(crtc))
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return -EINVAL;
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@ -12468,7 +12466,8 @@ static void intel_init_display(struct drm_device *dev)
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if (HAS_DDI(dev)) {
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dev_priv->display.get_pipe_config = haswell_get_pipe_config;
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dev_priv->display.get_plane_config = ironlake_get_plane_config;
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dev_priv->display.crtc_mode_set = haswell_crtc_mode_set;
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dev_priv->display.crtc_compute_clock =
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haswell_crtc_compute_clock;
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dev_priv->display.crtc_enable = haswell_crtc_enable;
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dev_priv->display.crtc_disable = haswell_crtc_disable;
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dev_priv->display.off = ironlake_crtc_off;
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