drm/i915: Covert HSW+ to choose DPLLS before disabling CRTCs

Use the infrastructure added in a previous patch to choose shared DPLLs
and calculate clocks before touching the hardware.

v2: Don't set mode_set hooks since dev_priv is kzalloc()'d (Ville)

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Ander Conselvan de Oliveira 2014-10-29 11:32:34 +02:00 committed by Daniel Vetter
parent 8bd31e67c9
commit 797d025923
2 changed files with 3 additions and 6 deletions

View File

@ -842,8 +842,6 @@ bool intel_ddi_pll_select(struct intel_crtc *intel_crtc)
intel_ddi_get_crtc_new_encoder(intel_crtc);
int clock = intel_crtc->new_config->port_clock;
intel_put_shared_dpll(intel_crtc);
return hsw_ddi_pll_select(intel_crtc, intel_encoder, clock);
}

View File

@ -7975,9 +7975,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
modeset_update_crtc_power_domains(dev);
}
static int haswell_crtc_mode_set(struct intel_crtc *crtc,
int x, int y,
struct drm_framebuffer *fb)
static int haswell_crtc_compute_clock(struct intel_crtc *crtc)
{
if (!intel_ddi_pll_select(crtc))
return -EINVAL;
@ -12468,7 +12466,8 @@ static void intel_init_display(struct drm_device *dev)
if (HAS_DDI(dev)) {
dev_priv->display.get_pipe_config = haswell_get_pipe_config;
dev_priv->display.get_plane_config = ironlake_get_plane_config;
dev_priv->display.crtc_mode_set = haswell_crtc_mode_set;
dev_priv->display.crtc_compute_clock =
haswell_crtc_compute_clock;
dev_priv->display.crtc_enable = haswell_crtc_enable;
dev_priv->display.crtc_disable = haswell_crtc_disable;
dev_priv->display.off = ironlake_crtc_off;