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Automatic merge of /spare/repo/netdev-2.6 branch dm9000
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commit
79121839aa
@ -824,6 +824,18 @@ config SMC9194
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<file:Documentation/networking/net-modules.txt>. The module
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will be called smc9194.
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config DM9000
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tristate "DM9000 support"
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depends on ARM && NET_ETHERNET
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select CRC32
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select MII
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---help---
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Support for DM9000 chipset.
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To compile this driver as a module, choose M here and read
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<file:Documentation/networking/net-modules.txt>. The module will be
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called dm9000.
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config NET_VENDOR_RACAL
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bool "Racal-Interlan (Micom) NI cards"
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depends on NET_ETHERNET && ISA
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@ -180,6 +180,7 @@ obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
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obj-$(CONFIG_IBMVETH) += ibmveth.o
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obj-$(CONFIG_S2IO) += s2io.o
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obj-$(CONFIG_SMC91X) += smc91x.o
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obj-$(CONFIG_DM9000) += dm9000.o
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obj-$(CONFIG_FEC_8XX) += fec_8xx/
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obj-$(CONFIG_ARM) += arm/
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1219
drivers/net/dm9000.c
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1219
drivers/net/dm9000.c
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File diff suppressed because it is too large
Load Diff
135
drivers/net/dm9000.h
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135
drivers/net/dm9000.h
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@ -0,0 +1,135 @@
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/*
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* dm9000 Ethernet
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*/
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#ifndef _DM9000X_H_
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#define _DM9000X_H_
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#define DM9000_ID 0x90000A46
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/* although the registers are 16 bit, they are 32-bit aligned.
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*/
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#define DM9000_NCR 0x00
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#define DM9000_NSR 0x01
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#define DM9000_TCR 0x02
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#define DM9000_TSR1 0x03
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#define DM9000_TSR2 0x04
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#define DM9000_RCR 0x05
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#define DM9000_RSR 0x06
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#define DM9000_ROCR 0x07
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#define DM9000_BPTR 0x08
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#define DM9000_FCTR 0x09
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#define DM9000_FCR 0x0A
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#define DM9000_EPCR 0x0B
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#define DM9000_EPAR 0x0C
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#define DM9000_EPDRL 0x0D
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#define DM9000_EPDRH 0x0E
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#define DM9000_WCR 0x0F
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#define DM9000_PAR 0x10
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#define DM9000_MAR 0x16
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#define DM9000_GPCR 0x1e
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#define DM9000_GPR 0x1f
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#define DM9000_TRPAL 0x22
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#define DM9000_TRPAH 0x23
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#define DM9000_RWPAL 0x24
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#define DM9000_RWPAH 0x25
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#define DM9000_VIDL 0x28
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#define DM9000_VIDH 0x29
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#define DM9000_PIDL 0x2A
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#define DM9000_PIDH 0x2B
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#define DM9000_CHIPR 0x2C
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#define DM9000_SMCR 0x2F
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#define DM9000_MRCMDX 0xF0
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#define DM9000_MRCMD 0xF2
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#define DM9000_MRRL 0xF4
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#define DM9000_MRRH 0xF5
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#define DM9000_MWCMDX 0xF6
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#define DM9000_MWCMD 0xF8
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#define DM9000_MWRL 0xFA
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#define DM9000_MWRH 0xFB
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#define DM9000_TXPLL 0xFC
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#define DM9000_TXPLH 0xFD
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#define DM9000_ISR 0xFE
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#define DM9000_IMR 0xFF
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#define NCR_EXT_PHY (1<<7)
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#define NCR_WAKEEN (1<<6)
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#define NCR_FCOL (1<<4)
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#define NCR_FDX (1<<3)
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#define NCR_LBK (3<<1)
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#define NCR_RST (1<<0)
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#define NSR_SPEED (1<<7)
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#define NSR_LINKST (1<<6)
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#define NSR_WAKEST (1<<5)
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#define NSR_TX2END (1<<3)
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#define NSR_TX1END (1<<2)
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#define NSR_RXOV (1<<1)
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#define TCR_TJDIS (1<<6)
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#define TCR_EXCECM (1<<5)
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#define TCR_PAD_DIS2 (1<<4)
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#define TCR_CRC_DIS2 (1<<3)
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#define TCR_PAD_DIS1 (1<<2)
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#define TCR_CRC_DIS1 (1<<1)
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#define TCR_TXREQ (1<<0)
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#define TSR_TJTO (1<<7)
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#define TSR_LC (1<<6)
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#define TSR_NC (1<<5)
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#define TSR_LCOL (1<<4)
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#define TSR_COL (1<<3)
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#define TSR_EC (1<<2)
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#define RCR_WTDIS (1<<6)
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#define RCR_DIS_LONG (1<<5)
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#define RCR_DIS_CRC (1<<4)
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#define RCR_ALL (1<<3)
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#define RCR_RUNT (1<<2)
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#define RCR_PRMSC (1<<1)
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#define RCR_RXEN (1<<0)
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#define RSR_RF (1<<7)
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#define RSR_MF (1<<6)
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#define RSR_LCS (1<<5)
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#define RSR_RWTO (1<<4)
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#define RSR_PLE (1<<3)
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#define RSR_AE (1<<2)
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#define RSR_CE (1<<1)
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#define RSR_FOE (1<<0)
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#define FCTR_HWOT(ot) (( ot & 0xf ) << 4 )
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#define FCTR_LWOT(ot) ( ot & 0xf )
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#define IMR_PAR (1<<7)
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#define IMR_ROOM (1<<3)
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#define IMR_ROM (1<<2)
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#define IMR_PTM (1<<1)
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#define IMR_PRM (1<<0)
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#define ISR_ROOS (1<<3)
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#define ISR_ROS (1<<2)
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#define ISR_PTS (1<<1)
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#define ISR_PRS (1<<0)
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#define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS)
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#define EPCR_REEP (1<<5)
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#define EPCR_WEP (1<<4)
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#define EPCR_EPOS (1<<3)
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#define EPCR_ERPRR (1<<2)
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#define EPCR_ERPRW (1<<1)
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#define EPCR_ERRE (1<<0)
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#define GPCR_GEP_CNTL (1<<0)
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#define DM9000_PKT_RDY 0x01 /* Packet ready to receive */
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#define DM9000_PKT_MAX 1536 /* Received packet max size */
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#endif /* _DM9000X_H_ */
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36
include/linux/dm9000.h
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36
include/linux/dm9000.h
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@ -0,0 +1,36 @@
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/* include/linux/dm9000.h
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*
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* Copyright (c) 2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Header file for dm9000 platform data
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __DM9000_PLATFORM_DATA
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#define __DM9000_PLATFORM_DATA __FILE__
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/* IO control flags */
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#define DM9000_PLATF_8BITONLY (0x0001)
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#define DM9000_PLATF_16BITONLY (0x0002)
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#define DM9000_PLATF_32BITONLY (0x0004)
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/* platfrom data for platfrom device structure's platfrom_data field */
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struct dm9000_plat_data {
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unsigned int flags;
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/* allow replacement IO routines */
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void (*inblk)(void __iomem *reg, void *data, int len);
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void (*outblk)(void __iomem *reg, void *data, int len);
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void (*dumpblk)(void __iomem *reg, int len);
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};
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#endif /* __DM9000_PLATFORM_DATA */
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