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spi: s3c64xx: move to generic dmaengine API
The spi-s3c64xx uses a Samsung proprietary interface for talking to the DMA engine, which does not work with multiplatform kernels. This version of the patch leaves the old code in place, behind an #ifdef. This can be removed in the future, after the s3c64xx platform start supporting the regular dmaengine interface. An earlier version of this patch was tested successfully on exynos5250 by Padma Venkat. The conversion was rather mechanical, since the samsung interface is just a shallow wrapper around the dmaengine interface. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Mark Brown
parent
6b8cc3306e
commit
788437273f
@ -10,6 +10,7 @@
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* published by the Free Software Foundation.
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*/
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#include <linux/amba/pl330.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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@ -1552,6 +1553,9 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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pd.num_cs = num_cs;
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pd.src_clk_nr = src_clk_nr;
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pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
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#ifdef CONFIG_PL330_DMA
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pd.filter = pl330_filter;
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#endif
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s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
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}
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@ -1590,6 +1594,9 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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pd.num_cs = num_cs;
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pd.src_clk_nr = src_clk_nr;
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pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
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#ifdef CONFIG_PL330_DMA
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pd.filter = pl330_filter;
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#endif
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s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
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}
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@ -1628,6 +1635,9 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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pd.num_cs = num_cs;
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pd.src_clk_nr = src_clk_nr;
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pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
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#ifdef CONFIG_PL330_DMA
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pd.filter = pl330_filter;
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#endif
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s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
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}
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@ -24,6 +24,7 @@
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/spi/spi.h>
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@ -31,9 +32,12 @@
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <mach/dma.h>
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#include <linux/platform_data/spi-s3c64xx.h>
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#ifdef CONFIG_SAMSUNG_DMADEV
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#include <mach/dma.h>
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#endif
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#define MAX_SPI_PORTS 3
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/* Registers and bit-fields */
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@ -131,9 +135,9 @@
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#define TXBUSY (1<<3)
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struct s3c64xx_spi_dma_data {
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unsigned ch;
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struct dma_chan *ch;
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enum dma_transfer_direction direction;
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enum dma_ch dmach;
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unsigned int dmach;
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};
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/**
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@ -195,16 +199,14 @@ struct s3c64xx_spi_driver_data {
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unsigned cur_speed;
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struct s3c64xx_spi_dma_data rx_dma;
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struct s3c64xx_spi_dma_data tx_dma;
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#ifdef CONFIG_SAMSUNG_DMADEV
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struct samsung_dma_ops *ops;
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#endif
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struct s3c64xx_spi_port_config *port_conf;
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unsigned int port_id;
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unsigned long gpios[4];
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};
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static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
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.name = "samsung-spi-dma",
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};
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static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
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{
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void __iomem *regs = sdd->regs;
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@ -281,6 +283,13 @@ static void s3c64xx_spi_dmacb(void *data)
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spin_unlock_irqrestore(&sdd->lock, flags);
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}
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#ifdef CONFIG_SAMSUNG_DMADEV
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/* FIXME: remove this section once arch/arm/mach-s3c64xx uses dmaengine */
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static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
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.name = "samsung-spi-dma",
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};
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static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
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unsigned len, dma_addr_t buf)
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{
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@ -294,14 +303,14 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
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config.direction = sdd->rx_dma.direction;
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config.fifo = sdd->sfr_start + S3C64XX_SPI_RX_DATA;
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config.width = sdd->cur_bpw / 8;
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sdd->ops->config(sdd->rx_dma.ch, &config);
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sdd->ops->config((enum dma_ch)sdd->rx_dma.ch, &config);
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} else {
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sdd = container_of((void *)dma,
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struct s3c64xx_spi_driver_data, tx_dma);
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config.direction = sdd->tx_dma.direction;
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config.fifo = sdd->sfr_start + S3C64XX_SPI_TX_DATA;
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config.width = sdd->cur_bpw / 8;
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sdd->ops->config(sdd->tx_dma.ch, &config);
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sdd->ops->config((enum dma_ch)sdd->tx_dma.ch, &config);
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}
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info.cap = DMA_SLAVE;
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@ -311,8 +320,8 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
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info.direction = dma->direction;
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info.buf = buf;
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sdd->ops->prepare(dma->ch, &info);
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sdd->ops->trigger(dma->ch);
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sdd->ops->prepare((enum dma_ch)dma->ch, &info);
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sdd->ops->trigger((enum dma_ch)dma->ch);
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}
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static int acquire_dma(struct s3c64xx_spi_driver_data *sdd)
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@ -325,12 +334,126 @@ static int acquire_dma(struct s3c64xx_spi_driver_data *sdd)
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req.cap = DMA_SLAVE;
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req.client = &s3c64xx_spi_dma_client;
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sdd->rx_dma.ch = sdd->ops->request(sdd->rx_dma.dmach, &req, dev, "rx");
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sdd->tx_dma.ch = sdd->ops->request(sdd->tx_dma.dmach, &req, dev, "tx");
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sdd->rx_dma.ch = (void *)sdd->ops->request(sdd->rx_dma.dmach, &req, dev, "rx");
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sdd->tx_dma.ch = (void *)sdd->ops->request(sdd->tx_dma.dmach, &req, dev, "tx");
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return 1;
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}
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static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/* Acquire DMA channels */
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while (!acquire_dma(sdd))
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usleep_range(10000, 11000);
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pm_runtime_get_sync(&sdd->pdev->dev);
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return 0;
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}
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static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/* Free DMA channels */
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sdd->ops->release((enum dma_ch)sdd->rx_dma.ch, &s3c64xx_spi_dma_client);
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sdd->ops->release((enum dma_ch)sdd->tx_dma.ch, &s3c64xx_spi_dma_client);
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pm_runtime_put(&sdd->pdev->dev);
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return 0;
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}
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static void s3c64xx_spi_dma_stop(struct s3c64xx_spi_driver_data *sdd,
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struct s3c64xx_spi_dma_data *dma)
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{
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sdd->ops->stop((enum dma_ch)dma->ch);
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}
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#else
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static void prepare_dma(struct s3c64xx_spi_dma_data *dma,
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unsigned len, dma_addr_t buf)
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{
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struct s3c64xx_spi_driver_data *sdd;
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struct dma_slave_config config;
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struct scatterlist sg;
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struct dma_async_tx_descriptor *desc;
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if (dma->direction == DMA_DEV_TO_MEM) {
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sdd = container_of((void *)dma,
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struct s3c64xx_spi_driver_data, rx_dma);
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config.direction = dma->direction;
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config.src_addr = sdd->sfr_start + S3C64XX_SPI_RX_DATA;
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config.src_addr_width = sdd->cur_bpw / 8;
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config.src_maxburst = 1;
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dmaengine_slave_config(dma->ch, &config);
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} else {
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sdd = container_of((void *)dma,
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struct s3c64xx_spi_driver_data, tx_dma);
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config.direction = dma->direction;
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config.dst_addr = sdd->sfr_start + S3C64XX_SPI_TX_DATA;
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config.dst_addr_width = sdd->cur_bpw / 8;
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config.dst_maxburst = 1;
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dmaengine_slave_config(dma->ch, &config);
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}
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sg_init_table(&sg, 1);
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sg_dma_len(&sg) = len;
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sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf)),
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len, offset_in_page(buf));
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sg_dma_address(&sg) = buf;
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desc = dmaengine_prep_slave_sg(dma->ch,
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&sg, 1, dma->direction, DMA_PREP_INTERRUPT);
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desc->callback = s3c64xx_spi_dmacb;
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desc->callback_param = dma;
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dmaengine_submit(desc);
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dma_async_issue_pending(dma->ch);
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}
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static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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dma_filter_fn filter = sdd->cntrlr_info->filter;
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struct device *dev = &sdd->pdev->dev;
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dma_cap_mask_t mask;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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/* Acquire DMA channels */
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sdd->rx_dma.ch = dma_request_slave_channel_compat(mask, filter,
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(void*)sdd->rx_dma.dmach, dev, "rx");
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sdd->tx_dma.ch = dma_request_slave_channel_compat(mask, filter,
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(void*)sdd->tx_dma.dmach, dev, "tx");
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pm_runtime_get_sync(&sdd->pdev->dev);
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return 0;
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}
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static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/* Free DMA channels */
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dma_release_channel(sdd->rx_dma.ch);
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dma_release_channel(sdd->tx_dma.ch);
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pm_runtime_put(&sdd->pdev->dev);
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return 0;
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}
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static void s3c64xx_spi_dma_stop(struct s3c64xx_spi_driver_data *sdd,
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struct s3c64xx_spi_dma_data *dma)
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{
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dmaengine_terminate_all(dma->ch);
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}
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#endif
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static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
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struct spi_device *spi,
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struct spi_transfer *xfer, int dma_mode)
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@ -713,9 +836,9 @@ static int s3c64xx_spi_transfer_one_message(struct spi_master *master,
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}
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/* Polling method for xfers not bigger than FIFO capacity */
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if (xfer->len <= ((FIFO_LVL_MASK(sdd) >> 1) + 1))
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use_dma = 0;
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else
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use_dma = 0;
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if (sdd->rx_dma.ch && sdd->tx_dma.ch &&
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(xfer->len > ((FIFO_LVL_MASK(sdd) >> 1) + 1)))
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use_dma = 1;
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spin_lock_irqsave(&sdd->lock, flags);
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@ -750,10 +873,10 @@ static int s3c64xx_spi_transfer_one_message(struct spi_master *master,
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if (use_dma) {
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if (xfer->tx_buf != NULL
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&& (sdd->state & TXBUSY))
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sdd->ops->stop(sdd->tx_dma.ch);
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s3c64xx_spi_dma_stop(sdd, &sdd->tx_dma);
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if (xfer->rx_buf != NULL
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&& (sdd->state & RXBUSY))
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sdd->ops->stop(sdd->rx_dma.ch);
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s3c64xx_spi_dma_stop(sdd, &sdd->rx_dma);
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}
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goto out;
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@ -790,32 +913,6 @@ out:
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return 0;
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}
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static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/* Acquire DMA channels */
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while (!acquire_dma(sdd))
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usleep_range(10000, 11000);
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pm_runtime_get_sync(&sdd->pdev->dev);
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return 0;
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}
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static int s3c64xx_spi_unprepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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/* Free DMA channels */
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sdd->ops->release(sdd->rx_dma.ch, &s3c64xx_spi_dma_client);
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sdd->ops->release(sdd->tx_dma.ch, &s3c64xx_spi_dma_client);
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pm_runtime_put(&sdd->pdev->dev);
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return 0;
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}
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static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata(
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struct spi_device *spi)
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{
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@ -11,6 +11,8 @@
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#ifndef __S3C64XX_PLAT_SPI_H
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#define __S3C64XX_PLAT_SPI_H
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#include <linux/dmaengine.h>
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struct platform_device;
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/**
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@ -38,6 +40,7 @@ struct s3c64xx_spi_info {
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int src_clk_nr;
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int num_cs;
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int (*cfg_gpio)(void);
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dma_filter_fn filter;
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};
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/**
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