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KVM: nVMX: Fully support nested VMX preemption timer
This patch contains the following two changes: 1. Fix the bug in nested preemption timer support. If vmexit L2->L0 with some reasons not emulated by L1, preemption timer value should be save in such exits. 2. Add support of "Save VMX-preemption timer value" VM-Exit controls to nVMX. With this patch, nested VMX preemption timer features are fully supported. Signed-off-by: Arthur Chunqi Li <yzt356@gmail.com> Reviewed-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -536,6 +536,7 @@
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/* MSR_IA32_VMX_MISC bits */
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#define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29)
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#define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE 0x1F
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/* AMD-V MSRs */
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#define MSR_VM_CR 0xc0010114
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@ -2200,7 +2200,13 @@ static __init void nested_vmx_setup_ctls_msrs(void)
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#ifdef CONFIG_X86_64
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VM_EXIT_HOST_ADDR_SPACE_SIZE |
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#endif
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VM_EXIT_LOAD_IA32_PAT | VM_EXIT_SAVE_IA32_PAT;
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VM_EXIT_LOAD_IA32_PAT | VM_EXIT_SAVE_IA32_PAT |
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VM_EXIT_SAVE_VMX_PREEMPTION_TIMER;
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if (!(nested_vmx_pinbased_ctls_high & PIN_BASED_VMX_PREEMPTION_TIMER) ||
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!(nested_vmx_exit_ctls_high & VM_EXIT_SAVE_VMX_PREEMPTION_TIMER)) {
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nested_vmx_exit_ctls_high &= ~VM_EXIT_SAVE_VMX_PREEMPTION_TIMER;
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nested_vmx_pinbased_ctls_high &= ~PIN_BASED_VMX_PREEMPTION_TIMER;
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}
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nested_vmx_exit_ctls_high |= (VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR |
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VM_EXIT_LOAD_IA32_EFER | VM_EXIT_SAVE_IA32_EFER);
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@ -6724,6 +6730,27 @@ static void vmx_get_exit_info(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2)
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*info2 = vmcs_read32(VM_EXIT_INTR_INFO);
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}
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static void nested_adjust_preemption_timer(struct kvm_vcpu *vcpu)
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{
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u64 delta_tsc_l1;
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u32 preempt_val_l1, preempt_val_l2, preempt_scale;
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if (!(get_vmcs12(vcpu)->pin_based_vm_exec_control &
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PIN_BASED_VMX_PREEMPTION_TIMER))
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return;
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preempt_scale = native_read_msr(MSR_IA32_VMX_MISC) &
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MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE;
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preempt_val_l2 = vmcs_read32(VMX_PREEMPTION_TIMER_VALUE);
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delta_tsc_l1 = vmx_read_l1_tsc(vcpu, native_read_tsc())
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- vcpu->arch.last_guest_tsc;
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preempt_val_l1 = delta_tsc_l1 >> preempt_scale;
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if (preempt_val_l2 <= preempt_val_l1)
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preempt_val_l2 = 0;
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else
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preempt_val_l2 -= preempt_val_l1;
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vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, preempt_val_l2);
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}
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/*
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* The guest has exited. See if we can fix it or if we need userspace
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* assistance.
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@ -7134,6 +7161,8 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
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atomic_switch_perf_msrs(vmx);
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debugctlmsr = get_debugctlmsr();
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if (is_guest_mode(vcpu) && !vmx->nested.nested_run_pending)
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nested_adjust_preemption_timer(vcpu);
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vmx->__launched = vmx->loaded_vmcs->launched;
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asm(
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/* Store host registers */
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@ -7543,6 +7572,7 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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{
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struct vcpu_vmx *vmx = to_vmx(vcpu);
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u32 exec_control;
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u32 exit_control;
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vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector);
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vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector);
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@ -7716,7 +7746,10 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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* we should use its exit controls. Note that VM_EXIT_LOAD_IA32_EFER
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* bits are further modified by vmx_set_efer() below.
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*/
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vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
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exit_control = vmcs_config.vmexit_ctrl;
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if (vmcs12->pin_based_vm_exec_control & PIN_BASED_VMX_PREEMPTION_TIMER)
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exit_control |= VM_EXIT_SAVE_VMX_PREEMPTION_TIMER;
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vmcs_write32(VM_EXIT_CONTROLS, exit_control);
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/* vmcs12's VM_ENTRY_LOAD_IA32_EFER and VM_ENTRY_IA32E_MODE are
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* emulated by vmx_set_efer(), below.
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@ -8124,6 +8157,11 @@ static void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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vmcs12->guest_pending_dbg_exceptions =
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vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS);
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if ((vmcs12->pin_based_vm_exec_control & PIN_BASED_VMX_PREEMPTION_TIMER) &&
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(vmcs12->vm_exit_controls & VM_EXIT_SAVE_VMX_PREEMPTION_TIMER))
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vmcs12->vmx_preemption_timer_value =
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vmcs_read32(VMX_PREEMPTION_TIMER_VALUE);
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/*
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* In some cases (usually, nested EPT), L2 is allowed to change its
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* own CR3 without exiting. If it has changed it, we must keep it.
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