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mt76x0: unify freq offset parsing

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Unify frequency offset parsing with mt76x2 driver using
eeprom utility routines available in mt76x02-lib module

Signed-off-by: Lorenzo Bianconi <lorenzo.bianconi@redhat.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
Lorenzo Bianconi 2018-09-20 11:12:01 +02:00 committed by Felix Fietkau
parent 2c0db839b4
commit 77d0f46564
5 changed files with 22 additions and 18 deletions
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3
drivers/net/wireless/mediatek/mt76/mt76x0/debugfs.c
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@ -102,7 +102,8 @@ mt76x0_eeprom_param_read(struct seq_file *file, void *data)
u16 val; u16 val;
int i; int i;
seq_printf(file, "RF freq offset: %hhx\n", dev->ee->rf_freq_off); seq_printf(file, "RF freq offset: %hhx\n",
dev->caldata.freq_offset);
seq_printf(file, "RSSI offset: %hhx %hhx\n", seq_printf(file, "RSSI offset: %hhx %hhx\n",
dev->caldata.rssi_offset[0], dev->caldata.rssi_offset[1]); dev->caldata.rssi_offset[0], dev->caldata.rssi_offset[1]);
seq_printf(file, "Temperature offset: %hhx\n", seq_printf(file, "Temperature offset: %hhx\n",

26
drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c
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@ -103,23 +103,21 @@ static void mt76x0_set_temp_offset(struct mt76x0_dev *dev)
dev->caldata.temp_offset = -10; dev->caldata.temp_offset = -10;
} }
static void static void mt76x0_set_freq_offset(struct mt76x0_dev *dev)
mt76x0_set_rf_freq_off(struct mt76x0_dev *dev, u8 *eeprom)
{ {
u8 comp; struct mt76x0_caldata *caldata = &dev->caldata;
u8 val;
comp = eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]; val = mt76x02_eeprom_get(&dev->mt76, MT_EE_FREQ_OFFSET);
if (!mt76x02_field_valid(comp)) if (!mt76x02_field_valid(val))
comp = 0; val = 0;
caldata->freq_offset = val;
dev->ee->rf_freq_off = eeprom[MT_EE_FREQ_OFFSET]; val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TSSI_BOUND4) >> 8;
if (!mt76x02_field_valid(dev->ee->rf_freq_off)) if (!mt76x02_field_valid(val))
dev->ee->rf_freq_off = 0; val = 0;
if (comp & BIT(7)) caldata->freq_offset -= mt76x02_sign_extend(val, 8);
dev->ee->rf_freq_off -= comp & 0x7f;
else
dev->ee->rf_freq_off += comp;
} }
void mt76x0_read_rx_gain(struct mt76x0_dev *dev) void mt76x0_read_rx_gain(struct mt76x0_dev *dev)
@ -286,7 +284,7 @@ mt76x0_eeprom_init(struct mt76x0_dev *dev)
mt76x02_mac_setaddr(&dev->mt76, eeprom + MT_EE_MAC_ADDR); mt76x02_mac_setaddr(&dev->mt76, eeprom + MT_EE_MAC_ADDR);
mt76x0_set_chip_cap(dev, eeprom); mt76x0_set_chip_cap(dev, eeprom);
mt76x0_set_rf_freq_off(dev, eeprom); mt76x0_set_freq_offset(dev);
mt76x0_set_temp_offset(dev); mt76x0_set_temp_offset(dev);
dev->chainmask = 0x0101; dev->chainmask = 0x0101;

3
drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h
View File

@ -33,11 +33,10 @@ struct mt76x0_caldata {
s8 lna_gain; s8 lna_gain;
s16 temp_offset; s16 temp_offset;
u8 freq_offset;
}; };
struct mt76x0_eeprom_params { struct mt76x0_eeprom_params {
u8 rf_freq_off;
/* TX_PWR_CFG_* values from EEPROM for 20 and 40 Mhz bandwidths. */ /* TX_PWR_CFG_* values from EEPROM for 20 and 40 Mhz bandwidths. */
u32 tx_pwr_cfg_2g[5][2]; u32 tx_pwr_cfg_2g[5][2];
u32 tx_pwr_cfg_5g[5][2]; u32 tx_pwr_cfg_5g[5][2];

3
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
View File

@ -942,7 +942,8 @@ mt76x0_rf_init(struct mt76x0_dev *dev)
E1: B0.R22<6:0>: xo_cxo<6:0> E1: B0.R22<6:0>: xo_cxo<6:0>
E2: B0.R21<0>: xo_cxo<0>, B0.R22<7:0>: xo_cxo<8:1> E2: B0.R21<0>: xo_cxo<0>, B0.R22<7:0>: xo_cxo<8:1>
*/ */
rf_wr(dev, MT_RF(0, 22), min_t(u8, dev->ee->rf_freq_off, 0xBF)); rf_wr(dev, MT_RF(0, 22),
min_t(u8, dev->caldata.freq_offset, 0xbf));
val = rf_rr(dev, MT_RF(0, 22)); val = rf_rr(dev, MT_RF(0, 22));
/* /*

5
drivers/net/wireless/mediatek/mt76/mt76x02_eeprom.h
View File

@ -74,7 +74,12 @@ enum mt76x02_eeprom_field {
MT_EE_2G_TARGET_POWER = 0x0d0, MT_EE_2G_TARGET_POWER = 0x0d0,
MT_EE_TEMP_OFFSET = 0x0d1, MT_EE_TEMP_OFFSET = 0x0d1,
MT_EE_TSSI_BOUND1 = 0x0d4,
MT_EE_TSSI_BOUND2 = 0x0d6,
MT_EE_TSSI_BOUND3 = 0x0d8,
MT_EE_TSSI_BOUND4 = 0x0da,
MT_EE_FREQ_OFFSET_COMPENSATION = 0x0db, MT_EE_FREQ_OFFSET_COMPENSATION = 0x0db,
MT_EE_TSSI_BOUND5 = 0x0dc,
MT_EE_TX_POWER_BYRATE_BASE = 0x0de, MT_EE_TX_POWER_BYRATE_BASE = 0x0de,
MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2, MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2,