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KVM: arm/arm64: Handle VGICv2 save/restore from the main VGIC code
We can program the GICv2 hypervisor control interface logic directly from the core vgic code and can instead do the save/restore directly from the flush/sync functions, which can lead to a number of future optimizations. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -92,16 +92,12 @@ static void __hyp_text __vgic_save_state(struct kvm_vcpu *vcpu)
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{
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if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
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__vgic_v3_save_state(vcpu);
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else
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__vgic_v2_save_state(vcpu);
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}
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static void __hyp_text __vgic_restore_state(struct kvm_vcpu *vcpu)
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{
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if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
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__vgic_v3_restore_state(vcpu);
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else
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__vgic_v2_restore_state(vcpu);
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}
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static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu)
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@ -120,8 +120,6 @@ typeof(orig) * __hyp_text fname(void) \
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return val; \
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}
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void __vgic_v2_save_state(struct kvm_vcpu *vcpu);
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void __vgic_v2_restore_state(struct kvm_vcpu *vcpu);
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int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_state(struct kvm_vcpu *vcpu);
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@ -196,16 +196,12 @@ static void __hyp_text __vgic_save_state(struct kvm_vcpu *vcpu)
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{
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if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
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__vgic_v3_save_state(vcpu);
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else
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__vgic_v2_save_state(vcpu);
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}
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static void __hyp_text __vgic_restore_state(struct kvm_vcpu *vcpu)
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{
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if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
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__vgic_v3_restore_state(vcpu);
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else
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__vgic_v2_restore_state(vcpu);
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}
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static bool __hyp_text __true_value(void)
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@ -23,71 +23,6 @@
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#include <asm/kvm_hyp.h>
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#include <asm/kvm_mmu.h>
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static void __hyp_text save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
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{
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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u64 elrsr;
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int i;
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elrsr = readl_relaxed(base + GICH_ELRSR0);
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if (unlikely(used_lrs > 32))
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elrsr |= ((u64)readl_relaxed(base + GICH_ELRSR1)) << 32;
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for (i = 0; i < used_lrs; i++) {
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if (elrsr & (1UL << i))
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cpu_if->vgic_lr[i] &= ~GICH_LR_STATE;
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else
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cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
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writel_relaxed(0, base + GICH_LR0 + (i * 4));
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}
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}
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/* vcpu is already in the HYP VA space */
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void __hyp_text __vgic_v2_save_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(vcpu->kvm);
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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if (!base)
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return;
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if (used_lrs) {
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cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);
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save_lrs(vcpu, base);
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writel_relaxed(0, base + GICH_HCR);
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} else {
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cpu_if->vgic_apr = 0;
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}
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}
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/* vcpu is already in the HYP VA space */
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void __hyp_text __vgic_v2_restore_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = kern_hyp_va(vcpu->kvm);
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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void __iomem *base = kern_hyp_va(vgic->vctrl_base);
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int i;
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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if (!base)
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return;
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if (used_lrs) {
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writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
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writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
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for (i = 0; i < used_lrs; i++) {
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writel_relaxed(cpu_if->vgic_lr[i],
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base + GICH_LR0 + (i * 4));
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}
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}
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}
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#ifdef CONFIG_ARM64
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/*
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* __vgic_v2_perform_cpuif_access -- perform a GICV access on behalf of the
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@ -421,6 +421,69 @@ out:
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return ret;
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}
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static void save_lrs(struct kvm_vcpu *vcpu, void __iomem *base)
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{
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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u64 elrsr;
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int i;
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elrsr = readl_relaxed(base + GICH_ELRSR0);
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if (unlikely(used_lrs > 32))
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elrsr |= ((u64)readl_relaxed(base + GICH_ELRSR1)) << 32;
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for (i = 0; i < used_lrs; i++) {
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if (elrsr & (1UL << i))
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cpu_if->vgic_lr[i] &= ~GICH_LR_STATE;
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else
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cpu_if->vgic_lr[i] = readl_relaxed(base + GICH_LR0 + (i * 4));
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writel_relaxed(0, base + GICH_LR0 + (i * 4));
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}
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}
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void vgic_v2_save_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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void __iomem *base = vgic->vctrl_base;
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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if (!base)
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return;
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if (used_lrs) {
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cpu_if->vgic_apr = readl_relaxed(base + GICH_APR);
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save_lrs(vcpu, base);
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writel_relaxed(0, base + GICH_HCR);
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} else {
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cpu_if->vgic_apr = 0;
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}
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}
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void vgic_v2_restore_state(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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struct vgic_dist *vgic = &kvm->arch.vgic;
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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void __iomem *base = vgic->vctrl_base;
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u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs;
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int i;
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if (!base)
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return;
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if (used_lrs) {
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writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR);
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writel_relaxed(cpu_if->vgic_apr, base + GICH_APR);
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for (i = 0; i < used_lrs; i++) {
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writel_relaxed(cpu_if->vgic_lr[i],
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base + GICH_LR0 + (i * 4));
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}
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}
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}
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void vgic_v2_load(struct kvm_vcpu *vcpu)
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{
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struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2;
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@ -749,11 +749,19 @@ next:
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vgic_clear_lr(vcpu, count);
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}
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static inline void vgic_save_state(struct kvm_vcpu *vcpu)
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{
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if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
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vgic_v2_save_state(vcpu);
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}
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/* Sync back the hardware VGIC state into our emulation after a guest's run. */
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void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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vgic_save_state(vcpu);
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WARN_ON(vgic_v4_sync_hwstate(vcpu));
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/* An empty ap_list_head implies used_lrs == 0 */
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@ -765,6 +773,12 @@ void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
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vgic_prune_ap_list(vcpu);
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}
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static inline void vgic_restore_state(struct kvm_vcpu *vcpu)
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{
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if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
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vgic_v2_restore_state(vcpu);
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}
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/* Flush our emulation state into the GIC hardware before entering the guest. */
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void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
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{
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@ -780,13 +794,16 @@ void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
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* this.
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*/
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if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head))
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return;
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goto out;
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DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
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spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
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vgic_flush_lr_state(vcpu);
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spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
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out:
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vgic_restore_state(vcpu);
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}
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void kvm_vgic_load(struct kvm_vcpu *vcpu)
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void vgic_v2_load(struct kvm_vcpu *vcpu);
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void vgic_v2_put(struct kvm_vcpu *vcpu);
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void vgic_v2_save_state(struct kvm_vcpu *vcpu);
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void vgic_v2_restore_state(struct kvm_vcpu *vcpu);
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static inline void vgic_get_irq_kref(struct vgic_irq *irq)
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{
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if (irq->intid < VGIC_MIN_LPI)
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