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drm/i915: add SBI registers

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Those are responsible for the Sideband Interface programming.

v2: rename SBI bits to better reflect their meaning

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Eugeni Dodonov 2012-03-29 12:32:29 -03:00 committed by Daniel Vetter
parent bb879a44ff
commit 7501a4d846
1 changed files with 12 additions and 0 deletions
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12
drivers/gpu/drm/i915/i915_reg.h
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@ -4116,4 +4116,16 @@
DDI_BUF_TRANS_A, \ DDI_BUF_TRANS_A, \
DDI_BUF_TRANS_B) DDI_BUF_TRANS_B)
/* Sideband Interface (SBI) is programmed indirectly, via
* SBI_ADDR, which contains the register offset; and SBI_DATA,
* which contains the payload */
#define SBI_ADDR 0xC6000
#define SBI_DATA 0xC6004
#define SBI_CTL_STAT 0xC6008
#define SBI_CTL_OP_CRRD (0x6<<8)
#define SBI_CTL_OP_CRWR (0x7<<8)
#define SBI_RESPONSE_FAIL (0x1<<1)
#define SBI_RESPONSE_SUCCESS (0x0<<1)
#define SBI_BUSY (0x1<<0)
#define SBI_READY (0x0<<0)
#endif /* _I915_REG_H_ */ #endif /* _I915_REG_H_ */