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irqchip/gic-v2m: Switch to device MSI
All platform MSI users and the PCI/MSI code handle per device MSI domains when the irqdomain associated to the device provides MSI parent functionality. Remove the "global" PCI/MSI and platform domain related code and provide the MSI parent functionality by filling in msi_parent_ops. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Anna-Maria Behnsen <anna-maria@linutronix.de> Signed-off-by: Shivamurthy Shastri <shivamurthy.shastri@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240623142235.514419280@linutronix.de
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@ -26,6 +26,7 @@ config ARM_GIC_V2M
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bool
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depends on PCI
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select ARM_GIC
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select IRQ_MSI_LIB
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select PCI_MSI
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config GIC_NON_BANKED
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@ -26,6 +26,8 @@
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#include <linux/irqchip/arm-gic.h>
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#include <linux/irqchip/arm-gic-common.h>
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#include "irq-msi-lib.h"
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/*
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* MSI_TYPER:
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* [31:26] Reserved
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@ -72,31 +74,6 @@ struct v2m_data {
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u32 flags; /* v2m flags for specific implementation */
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};
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static void gicv2m_mask_msi_irq(struct irq_data *d)
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{
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pci_msi_mask_irq(d);
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irq_chip_mask_parent(d);
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}
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static void gicv2m_unmask_msi_irq(struct irq_data *d)
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{
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pci_msi_unmask_irq(d);
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irq_chip_unmask_parent(d);
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}
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static struct irq_chip gicv2m_msi_irq_chip = {
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.name = "MSI",
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.irq_mask = gicv2m_mask_msi_irq,
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.irq_unmask = gicv2m_unmask_msi_irq,
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.irq_eoi = irq_chip_eoi_parent,
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};
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static struct msi_domain_info gicv2m_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI),
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.chip = &gicv2m_msi_irq_chip,
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};
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static phys_addr_t gicv2m_get_msi_addr(struct v2m_data *v2m, int hwirq)
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{
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if (v2m->flags & GICV2M_GRAVITON_ADDRESS_ONLY)
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@ -230,6 +207,7 @@ static void gicv2m_irq_domain_free(struct irq_domain *domain,
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}
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static const struct irq_domain_ops gicv2m_domain_ops = {
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.select = msi_lib_irq_domain_select,
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.alloc = gicv2m_irq_domain_alloc,
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.free = gicv2m_irq_domain_free,
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};
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@ -250,19 +228,6 @@ static bool is_msi_spi_valid(u32 base, u32 num)
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return true;
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}
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static struct irq_chip gicv2m_pmsi_irq_chip = {
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.name = "pMSI",
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};
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static struct msi_domain_ops gicv2m_pmsi_ops = {
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};
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static struct msi_domain_info gicv2m_pmsi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS),
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.ops = &gicv2m_pmsi_ops,
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.chip = &gicv2m_pmsi_irq_chip,
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};
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static void __init gicv2m_teardown(void)
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{
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struct v2m_data *v2m, *tmp;
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@ -278,9 +243,27 @@ static void __init gicv2m_teardown(void)
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}
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}
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#define GICV2M_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
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MSI_FLAG_USE_DEF_CHIP_OPS | \
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MSI_FLAG_PCI_MSI_MASK_PARENT)
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#define GICV2M_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
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MSI_FLAG_PCI_MSIX | \
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MSI_FLAG_MULTI_PCI_MSI)
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static struct msi_parent_ops gicv2m_msi_parent_ops = {
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.supported_flags = GICV2M_MSI_FLAGS_SUPPORTED,
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.required_flags = GICV2M_MSI_FLAGS_REQUIRED,
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.bus_select_token = DOMAIN_BUS_NEXUS,
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.bus_select_mask = MATCH_PCI_MSI | MATCH_PLATFORM_MSI,
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.prefix = "GICv2m-",
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.init_dev_msi_info = msi_lib_init_dev_msi_info,
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};
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static __init int gicv2m_allocate_domains(struct irq_domain *parent)
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{
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struct irq_domain *inner_domain, *pci_domain, *plat_domain;
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struct irq_domain *inner_domain;
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struct v2m_data *v2m;
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v2m = list_first_entry_or_null(&v2m_nodes, struct v2m_data, entry);
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@ -295,22 +278,8 @@ static __init int gicv2m_allocate_domains(struct irq_domain *parent)
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}
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irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS);
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pci_domain = pci_msi_create_irq_domain(v2m->fwnode,
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&gicv2m_msi_domain_info,
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inner_domain);
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plat_domain = platform_msi_create_irq_domain(v2m->fwnode,
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&gicv2m_pmsi_domain_info,
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inner_domain);
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if (!pci_domain || !plat_domain) {
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pr_err("Failed to create MSI domains\n");
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if (plat_domain)
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irq_domain_remove(plat_domain);
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if (pci_domain)
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irq_domain_remove(pci_domain);
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irq_domain_remove(inner_domain);
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return -ENOMEM;
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}
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inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
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inner_domain->msi_parent_ops = &gicv2m_msi_parent_ops;
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return 0;
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}
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@ -511,7 +480,7 @@ acpi_parse_madt_msi(union acpi_subtable_headers *header,
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pr_info("applying Amazon Graviton quirk\n");
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res.end = res.start + SZ_8K - 1;
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flags |= GICV2M_GRAVITON_ADDRESS_ONLY;
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gicv2m_msi_domain_info.flags &= ~MSI_FLAG_MULTI_PCI_MSI;
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gicv2m_msi_parent_ops.supported_flags &= ~MSI_FLAG_MULTI_PCI_MSI;
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}
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if (m->flags & ACPI_MADT_OVERRIDE_SPI_VALUES) {
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