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[ARM] 2969/1: miscellaneous whitespace cleanup
Patch from George G. Davis Fix leading, trailing and other miscellaneous whitespace issues in arch/arm/kernel/alignment.c. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -111,7 +111,7 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
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}
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static int proc_alignment_write(struct file *file, const char __user *buffer,
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unsigned long count, void *data)
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unsigned long count, void *data)
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{
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char mode;
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@ -119,7 +119,7 @@ static int proc_alignment_write(struct file *file, const char __user *buffer,
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if (get_user(mode, buffer))
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return -EFAULT;
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if (mode >= '0' && mode <= '5')
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ai_usermode = mode - '0';
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ai_usermode = mode - '0';
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}
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return count;
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}
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@ -262,7 +262,7 @@ union offset_union {
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goto fault; \
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} while (0)
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#define put32_unaligned_check(val,addr) \
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#define put32_unaligned_check(val,addr) \
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__put32_unaligned_check("strb", val, addr)
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#define put32t_unaligned_check(val,addr) \
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@ -306,19 +306,19 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
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return TYPE_LDST;
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user:
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if (LDST_L_BIT(instr)) {
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unsigned long val;
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get16t_unaligned_check(val, addr);
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if (LDST_L_BIT(instr)) {
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unsigned long val;
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get16t_unaligned_check(val, addr);
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/* signed half-word? */
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if (instr & 0x40)
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val = (signed long)((signed short) val);
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/* signed half-word? */
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if (instr & 0x40)
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val = (signed long)((signed short) val);
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regs->uregs[rd] = val;
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} else
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put16t_unaligned_check(regs->uregs[rd], addr);
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regs->uregs[rd] = val;
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} else
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put16t_unaligned_check(regs->uregs[rd], addr);
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return TYPE_LDST;
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return TYPE_LDST;
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fault:
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return TYPE_FAULT;
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@ -342,11 +342,11 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
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unsigned long val;
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get32_unaligned_check(val, addr);
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regs->uregs[rd] = val;
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get32_unaligned_check(val, addr+4);
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regs->uregs[rd+1] = val;
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get32_unaligned_check(val, addr + 4);
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regs->uregs[rd + 1] = val;
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} else {
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put32_unaligned_check(regs->uregs[rd], addr);
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put32_unaligned_check(regs->uregs[rd+1], addr+4);
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put32_unaligned_check(regs->uregs[rd + 1], addr + 4);
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}
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return TYPE_LDST;
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@ -356,11 +356,11 @@ do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
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unsigned long val;
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get32t_unaligned_check(val, addr);
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regs->uregs[rd] = val;
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get32t_unaligned_check(val, addr+4);
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regs->uregs[rd+1] = val;
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get32t_unaligned_check(val, addr + 4);
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regs->uregs[rd + 1] = val;
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} else {
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put32t_unaligned_check(regs->uregs[rd], addr);
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put32t_unaligned_check(regs->uregs[rd+1], addr+4);
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put32t_unaligned_check(regs->uregs[rd + 1], addr + 4);
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}
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return TYPE_LDST;
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@ -443,7 +443,7 @@ do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *reg
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if (LDST_P_EQ_U(instr)) /* U = P */
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eaddr += 4;
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/*
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/*
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* For alignment faults on the ARM922T/ARM920T the MMU makes
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* the FSR (and hence addr) equal to the updated base address
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* of the multiple access rather than the restored value.
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@ -570,7 +570,7 @@ thumb2arm(u16 tinstr)
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/* 6.5.1 Format 3: */
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case 0x4800 >> 11: /* 7.1.28 LDR(3) */
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/* NOTE: This case is not technically possible. We're
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* loading 32-bit memory data via PC relative
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* loading 32-bit memory data via PC relative
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* addressing mode. So we can and should eliminate
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* this case. But I'll leave it here for now.
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*/
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@ -642,7 +642,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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if (fault) {
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type = TYPE_FAULT;
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goto bad_or_fault;
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goto bad_or_fault;
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}
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if (user_mode(regs))
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