Minki/linux
1
0
Fork 1
mirror of https://github.com/torvalds/linux.git synced 2024-11-22 20:22:09 +00:00
Code Issues Packages Projects Releases Wiki Activity

Renesas fixes for v6.6 (take three)

Browse Source 
- Sort out a few Kconfig dependency issues for the rich set of RISC-V
     non-coherent DMA support.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZTowWwAKCRCKwlD9ZEnx
 cH8wAP49M82pS/aT2KpT+ANVdb7GqUemkYQKn9dI1y4yI5G+IwEAoDBzjUZ//aS0
 FgLgVyJrUUy3MVIGiqi/WX+N1GehjQg=
 =LXd4
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmU6gIIACgkQYKtH/8kJ
 UifTnw/+LaeGIZUGQ3FdBIS2vrQh0943M07jzyXVjXl14trbynFq1SRJLnXM+IAB
 osLqwQQaOlVTrUvSPafjqcm6XF/v3OS0jmpFkMgSK42kIpCGFOpgiV1DNBnCKevN
 FOVf4ztK1G+O0Z2MzwRQ4X54g4iaNh0VZdONsgRCZ/61CWflSNt20WCoDAFgMLUY
 DMvAR6OlSPV0v+xN/YYyj9oIIALApikgQZKo8AaTIN9qS6Xt8sIwLAODjCCe2B7w
 FQlUu7jLNGiXL40Rx9isvx4plmcbPWyq/CjsxX10eiTcO0Rlq8ow3GtYJ1YO4xjt
 XiGfq/PVExjUhxW2qQ1M//GFRnOESMx9vE+Pfyk2R9Uku9wd1Db8zBWPz63+EEgV
 ugRritPjlsJOi+wX7xzInUDbncR05pVD8XrVtN4GbzlP6FMX1b7GKe9EjkO2D6bj
 8ZL334+Rdhm5hmH+lQcagq7nfJUcjaTQOdDX7TIrZ78YH9q2/Ch2990y/ZrPEtsg
 pCjOMmHBRXKiiXja2tO5V3xsX0Hpbti67HdJXi07hOPQPq8+qcDBPrEply0dmKfi
 ZjzTjHAXmobzYp1kSpaj5GXqLTTHp3DydPOfVYE5s4R6yeZgdX82DHa97kaDh4vd
 6laRt6UB21CJd+DkpzP+s5ibvNFjPQq5k7sNEWriO3rrfcc/oRg=
 =+T5y
 -----END PGP SIGNATURE-----

Merge tag 'renesas-fixes-for-v6.6-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas fixes for v6.6 (take three)

  - Sort out a few Kconfig dependency issues for the rich set of RISC-V
    non-coherent DMA support.

* tag 'renesas-fixes-for-v6.6-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM
  riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM and ERRATA_THEAD_PBMT
  riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT

Link: https://lore.kernel.org/r/cover.1698312384.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-10-26 17:06:37 +02:00
commit 736a4aad8a
4 changed files with 4 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/riscv/Kconfig
View File

@ -273,11 +273,9 @@ config RISCV_DMA_NONCOHERENT
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB
select DMA_DIRECT_REMAP if MMU
config RISCV_NONSTANDARD_CACHE_OPS
bool
depends on RISCV_DMA_NONCOHERENT
help
This enables function pointer support for non-standard noncoherent
systems to handle cache management.
@ -550,6 +548,7 @@ config RISCV_ISA_ZICBOM
depends on RISCV_ALTERNATIVE
default y
select RISCV_DMA_NONCOHERENT
select DMA_DIRECT_REMAP
help
Adds support to dynamically detect the presence of the ZICBOM
extension (Cache Block Management Operations) and enable its

1
arch/riscv/Kconfig.errata
View File

@ -77,6 +77,7 @@ config ERRATA_THEAD_PBMT
config ERRATA_THEAD_CMO
bool "Apply T-Head cache management errata"
depends on ERRATA_THEAD && MMU
select DMA_DIRECT_REMAP
select RISCV_DMA_NONCOHERENT
default y
help

2
drivers/cache/Kconfig vendored
View File

@ -3,7 +3,7 @@ menu "Cache Drivers"
config AX45MP_L2_CACHE
bool "Andes Technology AX45MP L2 Cache controller"
depends on RISCV_DMA_NONCOHERENT
depends on RISCV
select RISCV_NONSTANDARD_CACHE_OPS
help
Support for the L2 cache controller on Andes Technology AX45MP platforms.

1
drivers/soc/renesas/Kconfig
View File

@ -335,6 +335,7 @@ config ARCH_R9A07G043
bool "RISC-V Platform support for RZ/Five"
depends on NONPORTABLE
depends on RISCV_ALTERNATIVE
depends on !RISCV_ISA_ZICBOM
depends on RISCV_SBI
select ARCH_RZG2L
select AX45MP_L2_CACHE