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arm: zynq: Load scu baseaddress at run time
Use Cortex a9 cp15 to read scu baseaddress. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -33,10 +33,13 @@
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#include <asm/mach-types.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/smp_scu.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "common.h"
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void __iomem *zynq_scu_base;
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static struct of_device_id zynq_of_bus_ids[] __initdata = {
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{ .compatible = "simple-bus", },
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{}
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@ -56,17 +59,6 @@ static void __init xilinx_init_machine(void)
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of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
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}
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#define SCU_PERIPH_PHYS 0xF8F00000
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#define SCU_PERIPH_SIZE SZ_8K
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#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE)
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static struct map_desc scu_desc __initdata = {
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.virtual = SCU_PERIPH_VIRT,
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.pfn = __phys_to_pfn(SCU_PERIPH_PHYS),
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.length = SCU_PERIPH_SIZE,
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.type = MT_DEVICE,
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};
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static void __init xilinx_zynq_timer_init(void)
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{
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struct device_node *np;
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@ -81,13 +73,31 @@ static void __init xilinx_zynq_timer_init(void)
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clocksource_of_init();
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}
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static struct map_desc zynq_cortex_a9_scu_map __initdata = {
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.length = SZ_256,
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.type = MT_DEVICE,
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};
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static void __init zynq_scu_map_io(void)
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{
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unsigned long base;
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base = scu_a9_get_base();
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zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base);
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/* Expected address is in vmalloc area that's why simple assign here */
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zynq_cortex_a9_scu_map.virtual = base;
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iotable_init(&zynq_cortex_a9_scu_map, 1);
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zynq_scu_base = (void __iomem *)base;
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BUG_ON(!zynq_scu_base);
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}
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/**
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* xilinx_map_io() - Create memory mappings needed for early I/O.
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*/
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static void __init xilinx_map_io(void)
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{
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debug_ll_io_init();
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iotable_init(&scu_desc, 1);
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zynq_scu_map_io();
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}
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static const char *xilinx_dt_match[] = {
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@ -17,4 +17,6 @@
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#ifndef __MACH_ZYNQ_COMMON_H__
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#define __MACH_ZYNQ_COMMON_H__
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extern void __iomem *zynq_scu_base;
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#endif
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