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gpio/langwell: Simplify demux loop

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Use __ffs() to find the pending interrupt source instead of looping 32
times.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Feng Tang <feng.tang@intel.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Thomas Gleixner 2011-03-17 19:32:55 +00:00 committed by Grant Likely
parent 674db90690
commit 732063b92b
1 changed files with 7 additions and 6 deletions
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13
drivers/gpio/langwell_gpio.c
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@ -191,19 +191,20 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc)
struct lnw_gpio *lnw = irq_data_get_irq_handler_data(data);
struct irq_chip *chip = irq_data_get_irq_chip(data);
u32 base, gpio, gedr_v;
unsigned long pending;
void __iomem *gedr;
/* check GPIO controller to check which pin triggered the interrupt */
for (base = 0; base < lnw->chip.ngpio; base += 32) {
gedr = gpio_reg(&lnw->chip, base, GEDR);
gedr_v = readl(gedr);
gedr_v = pending = readl(gedr);
if (!gedr_v)
continue;
for (gpio = base; gpio < base + 32; gpio++)
if (gedr_v & BIT(gpio % 32)) {
pr_debug("pin %d triggered\n", gpio);
generic_handle_irq(lnw->irq_base + gpio);
}
while (pending) {
gpio = __ffs(pending) - 1;
pending &= ~BIT(gpio);
generic_handle_irq(lnw->irq_base + base + gpio);
}
/* clear the edge detect status bit */
writel(gedr_v, gedr);
}