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soc: Amlogic driver updates for v5.3
- canvas: add support for Meson8* -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl0L8yEACgkQWTcYmtP7 xmXffA//XLMUCP7G+WWtcmui5J8zn09ePyLUSiohP+1OR5IxmsBP/Ojq5Vt/m/eN PrjDsi1aV3sw5tJ/V+fpB2z+ZwNoSTycsgCllXpRkJHQEUTF/tRc5TGSyktJOP9s LsjQ2ZLMDUWPnAlB4t8FCejHXl5ozPgXVCwyRqsXM2bLvkH71U/w2F8LBb8mayX4 4XN6NdekyHGKUXfL3+NDWr6Frvn5l0CWL9zqnlvAaTIMwKppS0aOzIdk/tjKCPx1 h4WONctwybPJRv/sQWlZrV7i2838+MRxEqdtVAE509E+8VJUPUI9znewXHFdwGS2 NnT2LKpsdpbmeX9haeKNwP0Im/PHDU0jpaBBGFqYHKWgkvyykHnk23x4U41jQ6vn 6MFS7G+u37NXxBRZJqkWfgOjWqJMea8r/dx6eBps3MfQSNrcv0z6mVHZqk5YXPC7 n8vm5BoTSEFh4Ja8GkH6QaEUTZn7nsawXSzq16yYS1uj63cakmoOO06xGBuVnZNJ qbPIGA0Mo/4eBM67mszepPJBGCt8Y3pUVKuV8CAzxw2fWutTCdc7BjKkbzicKmQN 6WFZ3PPz+rQS/uJF1CLJ8AsNfCZfSnaQg8g8kBSK9y2/5EwNa+mmy5WO8Lyx2i8B 0Gt4yC7zkRrKV5fHqONoNzFydrYZtQIz0dI3gOU0GtQuyb0t1LA= =NrZO -----END PGP SIGNATURE----- Merge tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers soc: Amlogic driver updates for v5.3 - canvas: add support for Meson8* * tag 'amlogic-drivers' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: canvas: add support for Meson8, Meson8b and Meson8m2 dt-bindings: soc: amlogic: canvas: document support for Meson8/8b/8m2 Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
71a34b7cc7
@ -2,8 +2,8 @@ Amlogic Canvas
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================================
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A canvas is a collection of metadata that describes a pixel buffer.
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Those metadata include: width, height, phyaddr, wrapping, block mode
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and endianness.
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Those metadata include: width, height, phyaddr, wrapping and block mode.
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Starting with GXBB the endianness can also be described.
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Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
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rather than use the phy addresses directly. For instance, this is the case for
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@ -18,7 +18,11 @@ Video Lookup Table
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--------------------------
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Required properties:
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- compatible: "amlogic,canvas"
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- compatible: has to be one of:
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- "amlogic,meson8-canvas", "amlogic,canvas" on Meson8
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- "amlogic,meson8b-canvas", "amlogic,canvas" on Meson8b
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- "amlogic,meson8m2-canvas", "amlogic,canvas" on Meson8m2
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- "amlogic,canvas" on GXBB and newer
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- reg: Base physical address and size of the canvas registers.
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Example:
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@ -35,6 +35,7 @@ struct meson_canvas {
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void __iomem *reg_base;
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spinlock_t lock; /* canvas device lock */
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u8 used[NUM_CANVAS];
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bool supports_endianness;
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};
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static void canvas_write(struct meson_canvas *canvas, u32 reg, u32 val)
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@ -86,6 +87,12 @@ int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index,
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{
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unsigned long flags;
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if (endian && !canvas->supports_endianness) {
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dev_err(canvas->dev,
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"Endianness is not supported on this SoC\n");
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return -EINVAL;
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}
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spin_lock_irqsave(&canvas->lock, flags);
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if (!canvas->used[canvas_index]) {
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dev_err(canvas->dev,
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@ -172,6 +179,8 @@ static int meson_canvas_probe(struct platform_device *pdev)
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if (IS_ERR(canvas->reg_base))
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return PTR_ERR(canvas->reg_base);
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canvas->supports_endianness = of_device_get_match_data(dev);
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canvas->dev = dev;
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spin_lock_init(&canvas->lock);
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dev_set_drvdata(dev, canvas);
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@ -180,7 +189,10 @@ static int meson_canvas_probe(struct platform_device *pdev)
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}
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static const struct of_device_id canvas_dt_match[] = {
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{ .compatible = "amlogic,canvas" },
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{ .compatible = "amlogic,meson8-canvas", .data = (void *)false, },
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{ .compatible = "amlogic,meson8b-canvas", .data = (void *)false, },
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{ .compatible = "amlogic,meson8m2-canvas", .data = (void *)false, },
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{ .compatible = "amlogic,canvas", .data = (void *)true, },
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{}
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};
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MODULE_DEVICE_TABLE(of, canvas_dt_match);
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