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powerpc/traps: Enhance readability for trap types
Define macros to list ppc interrupt types in interttupt.h, replace the reference of the trap hex values with these macros. Referred the hex numbers in arch/powerpc/kernel/exceptions-64e.S, arch/powerpc/kernel/exceptions-64s.S, arch/powerpc/kernel/head_*.S, arch/powerpc/kernel/head_booke.h and arch/powerpc/include/asm/kvm_asm.h. Signed-off-by: Xiongwei Song <sxwjean@gmail.com> [mpe: Resolve conflicts in nmi_disables_ftrace(), fix 40x build] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/1618398033-13025-1-git-send-email-sxwjean@me.com
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@ -9,6 +9,50 @@
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#include <asm/kprobes.h>
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#include <asm/runlatch.h>
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/* BookE/4xx */
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#define INTERRUPT_CRITICAL_INPUT 0x100
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/* BookE */
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#define INTERRUPT_DEBUG 0xd00
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#ifdef CONFIG_BOOKE
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#define INTERRUPT_PERFMON 0x260
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#define INTERRUPT_DOORBELL 0x280
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#endif
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/* BookS/4xx/8xx */
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#define INTERRUPT_MACHINE_CHECK 0x200
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/* BookS/8xx */
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#define INTERRUPT_SYSTEM_RESET 0x100
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/* BookS */
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#define INTERRUPT_DATA_SEGMENT 0x380
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#define INTERRUPT_INST_SEGMENT 0x480
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#define INTERRUPT_TRACE 0xd00
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#define INTERRUPT_H_DATA_STORAGE 0xe00
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#define INTERRUPT_H_FAC_UNAVAIL 0xf80
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#ifdef CONFIG_PPC_BOOK3S
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#define INTERRUPT_DOORBELL 0xa00
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#define INTERRUPT_PERFMON 0xf00
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#endif
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/* BookE/BookS/4xx/8xx */
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#define INTERRUPT_DATA_STORAGE 0x300
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#define INTERRUPT_INST_STORAGE 0x400
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#define INTERRUPT_ALIGNMENT 0x600
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#define INTERRUPT_PROGRAM 0x700
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#define INTERRUPT_SYSCALL 0xc00
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/* BookE/BookS/44x */
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#define INTERRUPT_FP_UNAVAIL 0x800
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/* BookE/BookS/44x/8xx */
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#define INTERRUPT_DECREMENTER 0x900
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#ifndef INTERRUPT_PERFMON
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#define INTERRUPT_PERFMON 0x0
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#endif
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static inline void nap_adjust_return(struct pt_regs *regs)
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{
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#ifdef CONFIG_PPC_970_NAP
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@ -65,7 +109,7 @@ static inline void interrupt_enter_prepare(struct pt_regs *regs, struct interrup
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* CT_WARN_ON comes here via program_check_exception,
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* so avoid recursion.
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*/
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if (TRAP(regs) != 0x700)
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if (TRAP(regs) != INTERRUPT_PROGRAM)
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CT_WARN_ON(ct_state() != CONTEXT_KERNEL);
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}
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#endif
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@ -131,13 +175,13 @@ static inline bool nmi_disables_ftrace(struct pt_regs *regs)
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{
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/* Allow DEC and PMI to be traced when they are soft-NMI */
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if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) {
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if (TRAP(regs) == 0x900)
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if (TRAP(regs) == INTERRUPT_DECREMENTER)
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return false;
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if (TRAP(regs) == 0xf00)
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if (TRAP(regs) == INTERRUPT_PERFMON)
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return false;
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}
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if (IS_ENABLED(CONFIG_PPC_BOOK3E)) {
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if (TRAP(regs) == 0x260)
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if (TRAP(regs) == INTERRUPT_PERFMON)
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return false;
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}
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@ -728,7 +728,7 @@ void crash_fadump(struct pt_regs *regs, const char *str)
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* If we came in via system reset, wait a while for the secondary
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* CPUs to enter.
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*/
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if (TRAP(&(fdh->regs)) == 0x100) {
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if (TRAP(&(fdh->regs)) == INTERRUPT_SYSTEM_RESET) {
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msecs = CRASH_TIMEOUT;
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while ((atomic_read(&cpus_in_fadump) < ncpus) && (--msecs > 0))
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mdelay(1);
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@ -447,7 +447,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs, unsign
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* CT_WARN_ON comes here via program_check_exception,
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* so avoid recursion.
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*/
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if (TRAP(regs) != 0x700)
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if (TRAP(regs) != INTERRUPT_PROGRAM)
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CT_WARN_ON(ct_state() == CONTEXT_USER);
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kuap = kuap_get_and_assert_locked();
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@ -1467,7 +1467,9 @@ static void __show_regs(struct pt_regs *regs)
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trap = TRAP(regs);
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if (!trap_is_syscall(regs) && cpu_has_feature(CPU_FTR_CFAR))
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pr_cont("CFAR: "REG" ", regs->orig_gpr3);
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if (trap == 0x200 || trap == 0x300 || trap == 0x600) {
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if (trap == INTERRUPT_MACHINE_CHECK ||
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trap == INTERRUPT_DATA_STORAGE ||
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trap == INTERRUPT_ALIGNMENT) {
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if (IS_ENABLED(CONFIG_4xx) || IS_ENABLED(CONFIG_BOOKE))
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pr_cont("DEAR: "REG" ESR: "REG" ", regs->dar, regs->dsisr);
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else
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@ -221,7 +221,7 @@ static void oops_end(unsigned long flags, struct pt_regs *regs,
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/*
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* system_reset_excption handles debugger, crash dump, panic, for 0x100
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*/
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if (TRAP(regs) == 0x100)
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if (TRAP(regs) == INTERRUPT_SYSTEM_RESET)
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return;
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crash_fadump(regs, "die oops");
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@ -289,7 +289,7 @@ void die(const char *str, struct pt_regs *regs, long err)
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/*
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* system_reset_excption handles debugger, crash dump, panic, for 0x100
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*/
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if (TRAP(regs) != 0x100) {
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if (TRAP(regs) != INTERRUPT_SYSTEM_RESET) {
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if (debugger(regs))
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return;
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}
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@ -1691,7 +1691,7 @@ DEFINE_INTERRUPT_HANDLER(facility_unavailable_exception)
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u8 status;
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bool hv;
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hv = (TRAP(regs) == 0xf80);
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hv = (TRAP(regs) == INTERRUPT_H_FAC_UNAVAIL);
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if (hv)
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value = mfspr(SPRN_HFSCR);
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else
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@ -24,6 +24,7 @@
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#include <asm/smp.h>
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#include <asm/setjmp.h>
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#include <asm/debug.h>
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#include <asm/interrupt.h>
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/*
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* The primary CPU waits a while for all secondary CPUs to enter. This is to
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@ -336,7 +337,7 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
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* If we came in via system reset, wait a while for the secondary
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* CPUs to enter.
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*/
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if (TRAP(regs) == 0x100)
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if (TRAP(regs) == INTERRUPT_SYSTEM_RESET)
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mdelay(PRIMARY_TIMEOUT);
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crash_kexec_prepare_cpus(crashing_cpu);
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@ -1156,7 +1156,7 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap)
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/* page is dirty */
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if (!test_bit(PG_dcache_clean, &page->flags) && !PageReserved(page)) {
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if (trap == 0x400) {
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if (trap == INTERRUPT_INST_STORAGE) {
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flush_dcache_icache_page(page);
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set_bit(PG_dcache_clean, &page->flags);
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} else
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@ -1556,7 +1556,7 @@ DEFINE_INTERRUPT_HANDLER_RET(__do_hash_fault)
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if (user_mode(regs) || (region_id == USER_REGION_ID))
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access &= ~_PAGE_PRIVILEGED;
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if (TRAP(regs) == 0x400)
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if (TRAP(regs) == INTERRUPT_INST_STORAGE)
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access |= _PAGE_EXEC;
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err = hash_page_mm(mm, ea, access, TRAP(regs), flags);
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@ -197,7 +197,7 @@ static int mm_fault_error(struct pt_regs *regs, unsigned long addr,
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static bool bad_kernel_fault(struct pt_regs *regs, unsigned long error_code,
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unsigned long address, bool is_write)
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{
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int is_exec = TRAP(regs) == 0x400;
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int is_exec = TRAP(regs) == INTERRUPT_INST_STORAGE;
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/* NX faults set DSISR_PROTFAULT on the 8xx, DSISR_NOEXEC_OR_G on others */
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if (is_exec && (error_code & (DSISR_NOEXEC_OR_G | DSISR_KEYFAULT |
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@ -391,7 +391,7 @@ static int ___do_page_fault(struct pt_regs *regs, unsigned long address,
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struct vm_area_struct * vma;
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struct mm_struct *mm = current->mm;
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unsigned int flags = FAULT_FLAG_DEFAULT;
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int is_exec = TRAP(regs) == 0x400;
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int is_exec = TRAP(regs) == INTERRUPT_INST_STORAGE;
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int is_user = user_mode(regs);
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int is_write = page_fault_is_write(error_code);
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vm_fault_t fault, major = 0;
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@ -574,20 +574,20 @@ static void __bad_page_fault(struct pt_regs *regs, int sig)
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/* kernel has accessed a bad area */
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switch (TRAP(regs)) {
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case 0x300:
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case 0x380:
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case 0xe00:
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case INTERRUPT_DATA_STORAGE:
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case INTERRUPT_DATA_SEGMENT:
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case INTERRUPT_H_DATA_STORAGE:
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pr_alert("BUG: %s on %s at 0x%08lx\n",
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regs->dar < PAGE_SIZE ? "Kernel NULL pointer dereference" :
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"Unable to handle kernel data access",
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is_write ? "write" : "read", regs->dar);
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break;
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case 0x400:
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case 0x480:
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case INTERRUPT_INST_STORAGE:
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case INTERRUPT_INST_SEGMENT:
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pr_alert("BUG: Unable to handle kernel instruction fetch%s",
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regs->nip < PAGE_SIZE ? " (NULL pointer?)\n" : "\n");
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break;
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case 0x600:
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case INTERRUPT_ALIGNMENT:
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pr_alert("BUG: Unable to handle kernel unaligned access at 0x%08lx\n",
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regs->dar);
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break;
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@ -17,6 +17,7 @@
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#include <asm/firmware.h>
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#include <asm/ptrace.h>
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#include <asm/code-patching.h>
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#include <asm/interrupt.h>
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#ifdef CONFIG_PPC64
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#include "internal.h"
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@ -168,7 +169,7 @@ static bool regs_use_siar(struct pt_regs *regs)
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* they have not been setup using perf_read_regs() and so regs->result
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* is something random.
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*/
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return ((TRAP(regs) == 0xf00) && regs->result);
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return ((TRAP(regs) == INTERRUPT_PERFMON) && regs->result);
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}
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/*
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@ -347,7 +348,7 @@ static inline void perf_read_regs(struct pt_regs *regs)
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* hypervisor samples as well as samples in the kernel with
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* interrupts off hence the userspace check.
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*/
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if (TRAP(regs) != 0xf00)
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if (TRAP(regs) != INTERRUPT_PERFMON)
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use_siar = 0;
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else if ((ppmu->flags & PPMU_NO_SIAR))
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use_siar = 0;
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@ -54,6 +54,7 @@
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#include <asm/code-patching.h>
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#include <asm/sections.h>
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#include <asm/inst.h>
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#include <asm/interrupt.h>
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#ifdef CONFIG_PPC64
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#include <asm/hvcall.h>
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@ -605,7 +606,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
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* debugger break (IPI). This is similar to
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* crash_kexec_secondary().
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*/
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if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
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if (TRAP(regs) != INTERRUPT_SYSTEM_RESET || !wait_for_other_cpus(ncpus))
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smp_send_debugger_break();
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wait_for_other_cpus(ncpus);
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@ -615,7 +616,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
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if (!locked_down) {
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/* for breakpoint or single step, print curr insn */
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if (bp || TRAP(regs) == 0xd00)
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if (bp || TRAP(regs) == INTERRUPT_TRACE)
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ppc_inst_dump(regs->nip, 1, 0);
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printf("enter ? for help\n");
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}
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@ -684,7 +685,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
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disable_surveillance();
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if (!locked_down) {
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/* for breakpoint or single step, print current insn */
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if (bp || TRAP(regs) == 0xd00)
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if (bp || TRAP(regs) == INTERRUPT_TRACE)
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ppc_inst_dump(regs->nip, 1, 0);
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printf("enter ? for help\n");
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}
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@ -1769,9 +1770,12 @@ static void excprint(struct pt_regs *fp)
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printf(" sp: %lx\n", fp->gpr[1]);
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printf(" msr: %lx\n", fp->msr);
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if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
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if (trap == INTERRUPT_DATA_STORAGE ||
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trap == INTERRUPT_DATA_SEGMENT ||
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trap == INTERRUPT_ALIGNMENT ||
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trap == INTERRUPT_MACHINE_CHECK) {
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printf(" dar: %lx\n", fp->dar);
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if (trap != 0x380)
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if (trap != INTERRUPT_DATA_SEGMENT)
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printf(" dsisr: %lx\n", fp->dsisr);
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}
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@ -1785,7 +1789,7 @@ static void excprint(struct pt_regs *fp)
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current->pid, current->comm);
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}
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if (trap == 0x700)
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if (trap == INTERRUPT_PROGRAM)
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print_bug_trap(fp);
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printf(linux_banner);
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@ -1837,7 +1841,9 @@ static void prregs(struct pt_regs *fp)
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printf("ctr = "REG" xer = "REG" trap = %4lx\n",
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fp->ctr, fp->xer, fp->trap);
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trap = TRAP(fp);
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if (trap == 0x300 || trap == 0x380 || trap == 0x600)
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if (trap == INTERRUPT_DATA_STORAGE ||
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trap == INTERRUPT_DATA_SEGMENT ||
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trap == INTERRUPT_ALIGNMENT)
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printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
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}
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