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usb: typec: ucsi_ccg: workaround for NVIDIA test device
NVIDIA VirtualLink (svid 0x955) has two altmode, vdo=0x1 for VirtualLink DP mode and vdo=0x3 for NVIDIA test mode. NVIDIA test device FTB (Function Test Board) reports altmode list with vdo=0x3 first and then vdo=0x1. The list is: SVID VDO 0xff01 0xc05 0x28de 0x8085 0x955 0x3 0x955 0x1 Current logic to assign mode value is based on order in altmode list. This causes a mismatch of CON and SOP altmodes since NVIDIA GPU connector has order of vdo=0x1 first and then vdo=0x3. Fixing this by changing the order of vdo values reported by NVIDIA test device. the new list will be: SVID VDO 0xff01 0xc05 0x28de 0x8085 0x955 0x1085 0x955 0x3 Also NVIDIA VirtualLink (svid 0x955) uses pin E for display mode. NVIDIA test device reports vdo of 0x1 so make sure vdo values always have pin E assignement. Signed-off-by: Ajay Gupta <ajayg@nvidia.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Link: https://lore.kernel.org/r/20200310121912.57879-1-heikki.krogerus@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -119,12 +119,14 @@ void ucsi_connector_change(struct ucsi *ucsi, u8 num);
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#define UCSI_SET_PDR_ACCEPT_ROLE_SWAPS BIT(25)
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/* GET_ALTERNATE_MODES command bits */
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#define UCSI_ALTMODE_RECIPIENT(_r_) (((_r_) >> 16) & 0x7)
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#define UCSI_GET_ALTMODE_RECIPIENT(_r_) ((u64)(_r_) << 16)
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#define UCSI_RECIPIENT_CON 0
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#define UCSI_RECIPIENT_SOP 1
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#define UCSI_RECIPIENT_SOP_P 2
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#define UCSI_RECIPIENT_SOP_PP 3
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#define UCSI_GET_ALTMODE_CONNECTOR_NUMBER(_r_) ((u64)(_r_) << 24)
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#define UCSI_ALTMODE_OFFSET(_r_) (((_r_) >> 32) & 0xff)
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#define UCSI_GET_ALTMODE_OFFSET(_r_) ((u64)(_r_) << 32)
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#define UCSI_GET_ALTMODE_NUM_ALTMODES(_r_) ((u64)(_r_) << 40)
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@ -125,6 +125,10 @@ struct version_format {
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#define CCG_FW_BUILD_NVIDIA (('n' << 8) | 'v')
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#define CCG_OLD_FW_VERSION (CCG_VERSION(0x31) | CCG_VERSION_PATCH(10))
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/* Altmode offset for NVIDIA Function Test Board (FTB) */
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#define NVIDIA_FTB_DP_OFFSET (2)
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#define NVIDIA_FTB_DBG_OFFSET (3)
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struct version_info {
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struct version_format base;
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struct version_format app;
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@ -477,24 +481,65 @@ static void ucsi_ccg_update_set_new_cam_cmd(struct ucsi_ccg *uc,
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*cmd |= UCSI_SET_NEW_CAM_SET_AM(cam);
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}
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/*
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* Change the order of vdo values of NVIDIA test device FTB
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* (Function Test Board) which reports altmode list with vdo=0x3
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* first and then vdo=0x. Current logic to assign mode value is
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* based on order in altmode list and it causes a mismatch of CON
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* and SOP altmodes since NVIDIA GPU connector has order of vdo=0x1
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* first and then vdo=0x3
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*/
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static void ucsi_ccg_nvidia_altmode(struct ucsi_ccg *uc,
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struct ucsi_altmode *alt)
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{
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switch (UCSI_ALTMODE_OFFSET(uc->last_cmd_sent)) {
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case NVIDIA_FTB_DP_OFFSET:
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if (alt[0].mid == USB_TYPEC_NVIDIA_VLINK_DBG_VDO)
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alt[0].mid = USB_TYPEC_NVIDIA_VLINK_DP_VDO |
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DP_CAP_DP_SIGNALING | DP_CAP_USB |
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DP_CONF_SET_PIN_ASSIGN(BIT(DP_PIN_ASSIGN_E));
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break;
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case NVIDIA_FTB_DBG_OFFSET:
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if (alt[0].mid == USB_TYPEC_NVIDIA_VLINK_DP_VDO)
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alt[0].mid = USB_TYPEC_NVIDIA_VLINK_DBG_VDO;
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break;
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default:
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break;
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}
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}
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static int ucsi_ccg_read(struct ucsi *ucsi, unsigned int offset,
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void *val, size_t val_len)
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{
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struct ucsi_ccg *uc = ucsi_get_drvdata(ucsi);
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int ret;
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u16 reg = CCGX_RAB_UCSI_DATA_BLOCK(offset);
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struct ucsi_altmode *alt;
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int ret;
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ret = ccg_read(uc, reg, val, val_len);
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if (ret)
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return ret;
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if (offset == UCSI_MESSAGE_IN) {
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if (UCSI_COMMAND(uc->last_cmd_sent) == UCSI_GET_CURRENT_CAM &&
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uc->has_multiple_dp) {
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if (offset != UCSI_MESSAGE_IN)
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return ret;
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switch (UCSI_COMMAND(uc->last_cmd_sent)) {
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case UCSI_GET_CURRENT_CAM:
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if (uc->has_multiple_dp)
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ucsi_ccg_update_get_current_cam_cmd(uc, (u8 *)val);
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break;
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case UCSI_GET_ALTERNATE_MODES:
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if (UCSI_ALTMODE_RECIPIENT(uc->last_cmd_sent) ==
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UCSI_RECIPIENT_SOP) {
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alt = val;
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if (alt[0].svid == USB_TYPEC_NVIDIA_VLINK_SID)
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ucsi_ccg_nvidia_altmode(uc, alt);
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}
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uc->last_cmd_sent = 0;
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break;
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default:
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break;
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}
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uc->last_cmd_sent = 0;
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return ret;
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}
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