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[SCSI] qla2xxx: Added a new entry to ISP specific function pointers structure.
Add a new function to ISP specific pointers structure to take care of ISP specific PCI IO space configuration. Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com> Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Giridhar Malavali
James Bottomley
parent
2e26426917
commit
706f457d00
@ -2244,6 +2244,7 @@ struct isp_operations {
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int (*get_flash_version) (struct scsi_qla_host *, void *);
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int (*start_scsi) (srb_t *);
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int (*abort_isp) (struct scsi_qla_host *);
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int (*iospace_config)(struct qla_hw_data*);
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};
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/* MSI-X Support *************************************************************/
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@ -1484,6 +1484,118 @@ qla24xx_disable_intrs(struct qla_hw_data *ha)
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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}
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static int
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qla2x00_iospace_config(struct qla_hw_data *ha)
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{
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resource_size_t pio;
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uint16_t msix;
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int cpus;
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if (IS_QLA82XX(ha))
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return qla82xx_iospace_config(ha);
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if (pci_request_selected_regions(ha->pdev, ha->bars,
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QLA2XXX_DRIVER_NAME)) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
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"Failed to reserve PIO/MMIO regions (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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if (!(ha->bars & 1))
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goto skip_pio;
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/* We only need PIO for Flash operations on ISP2312 v2 chips. */
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pio = pci_resource_start(ha->pdev, 0);
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if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
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if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
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ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
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"Invalid pci I/O region size (%s).\n",
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pci_name(ha->pdev));
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pio = 0;
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}
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} else {
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ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
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"Region #0 no a PIO resource (%s).\n",
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pci_name(ha->pdev));
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pio = 0;
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}
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ha->pio_address = pio;
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
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"PIO address=%llu.\n",
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(unsigned long long)ha->pio_address);
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skip_pio:
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/* Use MMIO operations for all accesses. */
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if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
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"Region #1 not an MMIO resource (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
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"Invalid PCI mem region size (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
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if (!ha->iobase) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
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"Cannot remap MMIO (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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/* Determine queue resources */
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ha->max_req_queues = ha->max_rsp_queues = 1;
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if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
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(ql2xmaxqueues > 1 && ql2xmultique_tag) ||
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(!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
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goto mqiobase_exit;
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ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
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pci_resource_len(ha->pdev, 3));
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if (ha->mqiobase) {
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
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"MQIO Base=%p.\n", ha->mqiobase);
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/* Read MSIX vector size of the board */
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pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
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ha->msix_count = msix;
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/* Max queues are bounded by available msix vectors */
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/* queue 0 uses two msix vectors */
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if (ql2xmultique_tag) {
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cpus = num_online_cpus();
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ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
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(cpus + 1) : (ha->msix_count - 1);
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ha->max_req_queues = 2;
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} else if (ql2xmaxqueues > 1) {
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ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
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QLA_MQ_SIZE : ql2xmaxqueues;
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ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
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"QoS mode set, max no of request queues:%d.\n",
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ha->max_req_queues);
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
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"QoS mode set, max no of request queues:%d.\n",
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ha->max_req_queues);
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}
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ql_log_pci(ql_log_info, ha->pdev, 0x001a,
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"MSI-X vector count: %d.\n", msix);
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} else
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ql_log_pci(ql_log_info, ha->pdev, 0x001b,
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"BAR 3 not enabled.\n");
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mqiobase_exit:
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ha->msix_count = ha->max_rsp_queues + 1;
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
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"MSIX Count:%d.\n", ha->msix_count);
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return (0);
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iospace_error_exit:
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return (-ENOMEM);
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}
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static struct isp_operations qla2100_isp_ops = {
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.pci_config = qla2100_pci_config,
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.reset_chip = qla2x00_reset_chip,
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@ -1518,6 +1630,7 @@ static struct isp_operations qla2100_isp_ops = {
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.get_flash_version = qla2x00_get_flash_version,
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.start_scsi = qla2x00_start_scsi,
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.abort_isp = qla2x00_abort_isp,
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.iospace_config = qla2x00_iospace_config,
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};
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static struct isp_operations qla2300_isp_ops = {
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@ -1554,6 +1667,7 @@ static struct isp_operations qla2300_isp_ops = {
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.get_flash_version = qla2x00_get_flash_version,
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.start_scsi = qla2x00_start_scsi,
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.abort_isp = qla2x00_abort_isp,
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.iospace_config = qla2x00_iospace_config,
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};
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static struct isp_operations qla24xx_isp_ops = {
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@ -1590,6 +1704,7 @@ static struct isp_operations qla24xx_isp_ops = {
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.get_flash_version = qla24xx_get_flash_version,
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.start_scsi = qla24xx_start_scsi,
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.abort_isp = qla2x00_abort_isp,
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.iospace_config = qla2x00_iospace_config,
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};
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static struct isp_operations qla25xx_isp_ops = {
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@ -1626,6 +1741,7 @@ static struct isp_operations qla25xx_isp_ops = {
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.get_flash_version = qla24xx_get_flash_version,
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.start_scsi = qla24xx_dif_start_scsi,
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.abort_isp = qla2x00_abort_isp,
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.iospace_config = qla2x00_iospace_config,
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};
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static struct isp_operations qla81xx_isp_ops = {
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@ -1662,6 +1778,7 @@ static struct isp_operations qla81xx_isp_ops = {
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.get_flash_version = qla24xx_get_flash_version,
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.start_scsi = qla24xx_dif_start_scsi,
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.abort_isp = qla2x00_abort_isp,
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.iospace_config = qla2x00_iospace_config,
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};
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static struct isp_operations qla82xx_isp_ops = {
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@ -1698,6 +1815,7 @@ static struct isp_operations qla82xx_isp_ops = {
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.get_flash_version = qla24xx_get_flash_version,
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.start_scsi = qla82xx_start_scsi,
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.abort_isp = qla82xx_abort_isp,
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.iospace_config = qla82xx_iospace_config,
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};
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static inline void
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@ -1811,117 +1929,6 @@ qla2x00_set_isp_flags(struct qla_hw_data *ha)
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ha->device_type, ha->flags.port0, ha->fw_srisc_address);
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}
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static int
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qla2x00_iospace_config(struct qla_hw_data *ha)
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{
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resource_size_t pio;
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uint16_t msix;
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int cpus;
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if (IS_QLA82XX(ha))
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return qla82xx_iospace_config(ha);
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if (pci_request_selected_regions(ha->pdev, ha->bars,
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QLA2XXX_DRIVER_NAME)) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
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"Failed to reserve PIO/MMIO regions (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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if (!(ha->bars & 1))
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goto skip_pio;
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/* We only need PIO for Flash operations on ISP2312 v2 chips. */
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pio = pci_resource_start(ha->pdev, 0);
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if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
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if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
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ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
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"Invalid pci I/O region size (%s).\n",
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pci_name(ha->pdev));
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pio = 0;
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}
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} else {
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ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
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"Region #0 no a PIO resource (%s).\n",
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pci_name(ha->pdev));
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pio = 0;
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}
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ha->pio_address = pio;
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
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"PIO address=%llu.\n",
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(unsigned long long)ha->pio_address);
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skip_pio:
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/* Use MMIO operations for all accesses. */
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if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
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"Region #1 not an MMIO resource (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
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"Invalid PCI mem region size (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
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if (!ha->iobase) {
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ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
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"Cannot remap MMIO (%s), aborting.\n",
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pci_name(ha->pdev));
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goto iospace_error_exit;
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}
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/* Determine queue resources */
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ha->max_req_queues = ha->max_rsp_queues = 1;
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if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
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(ql2xmaxqueues > 1 && ql2xmultique_tag) ||
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(!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
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goto mqiobase_exit;
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ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
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pci_resource_len(ha->pdev, 3));
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if (ha->mqiobase) {
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
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"MQIO Base=%p.\n", ha->mqiobase);
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/* Read MSIX vector size of the board */
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pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
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ha->msix_count = msix;
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/* Max queues are bounded by available msix vectors */
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/* queue 0 uses two msix vectors */
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if (ql2xmultique_tag) {
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cpus = num_online_cpus();
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ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
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(cpus + 1) : (ha->msix_count - 1);
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ha->max_req_queues = 2;
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} else if (ql2xmaxqueues > 1) {
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ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
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QLA_MQ_SIZE : ql2xmaxqueues;
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ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
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"QoS mode set, max no of request queues:%d.\n",
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ha->max_req_queues);
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
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"QoS mode set, max no of request queues:%d.\n",
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ha->max_req_queues);
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}
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ql_log_pci(ql_log_info, ha->pdev, 0x001a,
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"MSI-X vector count: %d.\n", msix);
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} else
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ql_log_pci(ql_log_info, ha->pdev, 0x001b,
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"BAR 3 not enabled.\n");
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mqiobase_exit:
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ha->msix_count = ha->max_rsp_queues + 1;
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ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
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"MSIX Count:%d.\n", ha->msix_count);
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return (0);
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iospace_error_exit:
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return (-ENOMEM);
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}
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static void
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qla2xxx_scan_start(struct Scsi_Host *shost)
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{
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@ -2020,19 +2027,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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pdev->needs_freset = 1;
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}
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/* Configure PCI I/O space */
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ret = qla2x00_iospace_config(ha);
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if (ret)
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goto probe_hw_failed;
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ql_log_pci(ql_log_info, pdev, 0x001d,
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"Found an ISP%04X irq %d iobase 0x%p.\n",
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pdev->device, pdev->irq, ha->iobase);
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ha->prev_topology = 0;
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ha->init_cb_size = sizeof(init_cb_t);
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ha->link_data_rate = PORT_SPEED_UNKNOWN;
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ha->optrom_size = OPTROM_SIZE_2300;
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/* Assign ISP specific operations. */
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max_id = MAX_TARGETS_2200;
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if (IS_QLA2100(ha)) {
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@ -2140,6 +2134,20 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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"flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
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ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
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ha->nvram_conf_off, ha->nvram_data_off);
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/* Configure PCI I/O space */
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ret = ha->isp_ops->iospace_config(ha);
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if (ret)
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goto probe_hw_failed;
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ql_log_pci(ql_log_info, pdev, 0x001d,
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"Found an ISP%04X irq %d iobase 0x%p.\n",
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pdev->device, pdev->irq, ha->iobase);
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ha->prev_topology = 0;
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ha->init_cb_size = sizeof(init_cb_t);
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ha->link_data_rate = PORT_SPEED_UNKNOWN;
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ha->optrom_size = OPTROM_SIZE_2300;
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mutex_init(&ha->vport_lock);
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init_completion(&ha->mbx_cmd_comp);
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complete(&ha->mbx_cmd_comp);
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