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ARM: PNX4008: get i2c clock rate from clk API
Acked-by: Vitaly Wool <vitalywool@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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parent
ebdbbf2003
commit
6fff3da998
@ -638,9 +638,10 @@ static struct clk flash_ck = {
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static struct clk i2c0_ck = {
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.name = "i2c0_ck",
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.parent = &per_ck,
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.flags = NEEDS_INITIALIZATION,
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.flags = NEEDS_INITIALIZATION | FIXED_RATE,
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.enable_shift = 0,
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.enable_reg = I2CCLKCTRL_REG,
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.rate = 13000000,
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.enable = clk_reg_enable,
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.disable = clk_reg_disable,
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};
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@ -648,9 +649,10 @@ static struct clk i2c0_ck = {
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static struct clk i2c1_ck = {
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.name = "i2c1_ck",
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.parent = &per_ck,
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.flags = NEEDS_INITIALIZATION,
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.flags = NEEDS_INITIALIZATION | FIXED_RATE,
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.enable_shift = 1,
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.enable_reg = I2CCLKCTRL_REG,
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.rate = 13000000,
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.enable = clk_reg_enable,
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.disable = clk_reg_disable,
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};
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@ -658,9 +660,10 @@ static struct clk i2c1_ck = {
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static struct clk i2c2_ck = {
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.name = "i2c2_ck",
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.parent = &per_ck,
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.flags = NEEDS_INITIALIZATION,
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.flags = NEEDS_INITIALIZATION | FIXED_RATE,
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.enable_shift = 2,
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.enable_reg = USB_OTG_CLKCTRL_REG,
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.rate = 13000000,
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.enable = clk_reg_enable,
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.disable = clk_reg_disable,
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};
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@ -18,12 +18,6 @@
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#include <mach/irqs.h>
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#include <mach/i2c.h>
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static u32 calculate_input_freq(struct platform_device *pdev)
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{
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return HCLK_MHZ;
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}
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static struct i2c_pnx_algo_data pnx_algo_data0 = {
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.base = PNX4008_I2C1_BASE,
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.irq = I2C_1_INT,
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@ -54,17 +48,14 @@ static struct i2c_adapter pnx_adapter2 = {
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};
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static struct i2c_pnx_data i2c0_data = {
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.calculate_input_freq = calculate_input_freq,
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.adapter = &pnx_adapter0,
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};
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static struct i2c_pnx_data i2c1_data = {
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.calculate_input_freq = calculate_input_freq,
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.adapter = &pnx_adapter1,
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};
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static struct i2c_pnx_data i2c2_data = {
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.calculate_input_freq = calculate_input_freq,
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.adapter = &pnx_adapter2,
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};
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@ -31,7 +31,6 @@
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#define I2C_PNX_TIMEOUT 10 /* msec */
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#define I2C_PNX_SPEED_KHZ 100
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#define I2C_PNX_REGION_SIZE 0x100
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#define PNX_DEFAULT_FREQ 13 /* MHz */
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static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
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{
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@ -578,7 +577,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
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unsigned long tmp;
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int ret = 0;
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struct i2c_pnx_algo_data *alg_data;
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int freq_mhz;
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unsigned long freq;
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struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
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if (!i2c_pnx || !i2c_pnx->adapter) {
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@ -599,14 +598,6 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
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goto out_drvdata;
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}
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if (i2c_pnx->calculate_input_freq)
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freq_mhz = i2c_pnx->calculate_input_freq(pdev);
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else {
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freq_mhz = PNX_DEFAULT_FREQ;
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dev_info(&pdev->dev, "Setting bus frequency to default value: "
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"%d MHz\n", freq_mhz);
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}
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init_timer(&alg_data->mif.timer);
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alg_data->mif.timer.function = i2c_pnx_timeout;
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alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
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@ -632,6 +623,8 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
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if (ret)
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goto out_unmap;
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freq = clk_get_rate(alg_data->clk);
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/*
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* Clock Divisor High This value is the number of system clocks
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* the serial clock (SCL) will be high.
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@ -643,7 +636,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
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* the deglitching filter length.
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*/
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tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
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tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
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iowrite32(tmp, I2C_REG_CKH(alg_data));
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iowrite32(tmp, I2C_REG_CKL(alg_data));
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@ -34,7 +34,6 @@ struct i2c_pnx_algo_data {
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};
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struct i2c_pnx_data {
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u32 (*calculate_input_freq) (struct platform_device *pdev);
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struct i2c_adapter *adapter;
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};
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