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drm/sun4i: drc: Make sure we enforce the clock rate

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The DRC needs to run at 300MHz to be functional. This was done so far
using assigned-clocks in the device tree, but that is easy to forget, and
doesn't provide any other guarantee than the rate is going to be roughly
the one requested at probe time.

Therefore it's pretty fragile, so let's just use the exclusive clock API to
enforce it.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20200107165957.672435-2-maxime@cerno.tech
This commit is contained in:
Maxime Ripard 2020-01-07 17:59:57 +01:00
parent 451debe557
commit 6fe082b0fb
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1 changed files with 8 additions and 0 deletions
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8
drivers/gpu/drm/sun4i/sun6i_drc.c
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@ -56,6 +56,13 @@ static int sun6i_drc_bind(struct device *dev, struct device *master,
ret = PTR_ERR(drc->mod_clk);
goto err_disable_bus_clk;
}
ret = clk_set_rate_exclusive(drc->mod_clk, 300000000);
if (ret) {
dev_err(dev, "Couldn't set the module clock frequency\n");
goto err_disable_bus_clk;
}
clk_prepare_enable(drc->mod_clk);
return 0;
@ -72,6 +79,7 @@ static void sun6i_drc_unbind(struct device *dev, struct device *master,
{
struct sun6i_drc *drc = dev_get_drvdata(dev);
clk_rate_exclusive_put(drc->mod_clk);
clk_disable_unprepare(drc->mod_clk);
clk_disable_unprepare(drc->bus_clk);
reset_control_assert(drc->reset);