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arm64: dts: rockchip: add Protonic MECSBC device-tree
MECSBC is a single board computer for blood analysis machines from RR-Mechatronics, designed and manufactured by Protonic Holland, based on the Rockchip RK3568 SoC. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20240405-protonic-mecsbc-v2-2-0a6fedc78b9f@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
David Jander
Heiko Stuebner
parent
6eb006d7c8
commit
6f9dfb7358
@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mecsbc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
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404
arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
Normal file
404
arch/arm64/boot/dts/rockchip/rk3568-mecsbc.dts
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@ -0,0 +1,404 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/pwm/pwm.h>
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#include "rk3568.dtsi"
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/ {
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model = "Protonic MECSBC";
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compatible = "prt,mecsbc", "rockchip,rk3568";
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc0;
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};
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chosen: chosen {
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stdout-path = "serial2:1500000n8";
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};
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tas2562-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,name = "Speaker";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s1_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&tas2562>;
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};
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};
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vdd_gpu: regulator-vdd-gpu {
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 5000 PWM_POLARITY_INVERTED>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <915000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
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};
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p3v3: regulator-p3v3 {
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compatible = "regulator-fixed";
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regulator-name = "p3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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p1v8: regulator-p1v8 {
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compatible = "regulator-fixed";
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regulator-name = "p1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_sd: regulator-sd {
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compatible = "regulator-gpio";
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enable-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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regulator-name = "sdcard-gpio-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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states = <1800000 0x1>, <3300000 0x0>;
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};
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vdd_npu: regulator-vdd-npu {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 5000 PWM_POLARITY_INVERTED>;
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regulator-name = "vdd_npu";
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regulator-min-microvolt = <915000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-dutycycle-range = <0 100>; /* dutycycle inverted 0% => 0.915V */
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};
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};
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&combphy0 {
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status = "okay";
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};
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&combphy1 {
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status = "okay";
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};
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&combphy2 {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu1 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu2 {
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cpu-supply = <&vdd_cpu>;
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};
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&cpu3 {
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cpu-supply = <&vdd_cpu>;
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};
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&gmac1 {
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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phy-handle = <&rgmii_phy1>;
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phy-mode = "rgmii-id";
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clock_in_out = "output";
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_clkinout
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&gmac1m1_rgmii_bus>;
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&gpu_opp_table {
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compatible = "operating-points-v2";
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opp-200000000 {
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opp-hz = /bits/ 64 <200000000>;
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opp-microvolt = <915000>;
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};
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opp-300000000 {
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opp-hz = /bits/ 64 <300000000>;
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opp-microvolt = <915000>;
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};
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opp-400000000 {
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opp-hz = /bits/ 64 <400000000>;
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opp-microvolt = <915000>;
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};
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <920000>;
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};
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opp-700000000 {
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opp-hz = /bits/ 64 <700000000>;
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opp-microvolt = <950000>;
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};
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opp-800000000 {
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opp-hz = /bits/ 64 <800000000>;
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opp-microvolt = <1000000>;
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};
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};
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&i2c0 {
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status = "okay";
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vdd_cpu: regulator@60 {
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compatible = "fcs,fan53555";
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reg = <0x60>;
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fcs,suspend-voltage-selector = <1>;
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regulator-name = "vdd_cpu";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1150000>;
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regulator-ramp-delay = <2300>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&i2c2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2m0_xfer>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3m0_xfer>;
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status = "okay";
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tas2562: amplifier@4c {
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compatible = "ti,tas2562";
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reg = <0x4c>;
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#sound-dai-cells = <0>;
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shutdown-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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interrupt-parent = <&gpio1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tas2562>;
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interrupts = <RK_PD1 IRQ_TYPE_LEVEL_LOW>;
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ti,imon-slot-no = <0>;
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};
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};
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&i2c5 {
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status = "okay";
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temperature-sensor@48 {
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compatible = "ti,tmp1075";
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reg = <0x48>;
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};
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rtc@51 {
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compatible = "nxp,pcf85363";
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reg = <0x51>;
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#clock-cells = <0>;
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clock-output-names = "rtcic_32kout";
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};
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};
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&i2s1_8ch {
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pinctrl-names = "default";
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pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
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rockchip,trcm-sync-tx-only;
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status = "okay";
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};
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&mdio1 {
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rgmii_phy1: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x2>;
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pinctrl-names = "default";
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pinctrl-0 = <ð_phy1_rst>;
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reset-assert-us = <20000>;
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reset-deassert-us = <100000>;
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reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
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};
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};
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&pcie2x1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie20m1_pins>;
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reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie3x2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie30x2m1_pins>;
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&p3v3>;
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status = "okay";
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};
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&pinctrl {
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ethernet {
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eth_phy1_rst: eth-phy1-rst {
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rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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tas2562 {
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pinctrl_tas2562: tas2562 {
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rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pmu_io_domains {
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pmuio1-supply = <&p3v3>;
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pmuio2-supply = <&p3v3>;
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vccio1-supply = <&p1v8>;
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vccio2-supply = <&p1v8>;
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vccio3-supply = <&vcc_sd>;
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vccio4-supply = <&p1v8>;
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vccio5-supply = <&p3v3>;
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vccio6-supply = <&p1v8>;
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vccio7-supply = <&p3v3>;
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status = "okay";
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};
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&pwm1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm1m0_pins>;
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};
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&pwm2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm2m0_pins>;
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};
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&saradc {
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vref-supply = <&p1v8>;
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status = "okay";
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};
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&sdhci {
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bus-width = <8>;
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max-frequency = <200000000>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
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vmmc-supply = <&p3v3>;
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vqmmc-supply = <&p1v8>;
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mmc-hs200-1_8v;
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non-removable;
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no-sd;
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no-sdio;
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status = "okay";
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};
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&sdmmc0 {
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bus-width = <4>;
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cap-sd-highspeed;
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cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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vmmc-supply = <&p3v3>;
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vqmmc-supply = <&vcc_sd>;
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status = "okay";
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};
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&tsadc {
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rockchip,hw-tshut-mode = <1>;
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rockchip,hw-tshut-polarity = <0>;
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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&usb_host0_ohci {
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status = "okay";
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};
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&usb_host0_xhci {
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dr_mode = "host";
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extcon = <&usb2phy0>;
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status = "okay";
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};
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&usb_host1_ehci {
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status = "okay";
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};
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&usb_host1_ohci {
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status = "okay";
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};
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&usb_host1_xhci {
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status = "okay";
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};
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&usb2phy0 {
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status = "okay";
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};
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&usb2phy0_host {
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status = "okay";
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};
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&usb2phy0_otg {
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status = "okay";
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};
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&usb2phy1 {
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status = "okay";
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};
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&usb2phy1_host {
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status = "okay";
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};
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&usb2phy1_otg {
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status = "okay";
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};
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