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x86, ioapic: Clean up ioapic/apic_id usage
While looking at the code, apic_id sometime is referred to index of ioapic, but sometime is used for phys apic id. and some even use apic for real apic id. It is very confusing. So try to limit apic_id or ioapic_id to be real apic id for ioapic, and use ioapic_idx for ioapic index in the array. -v2: Suggested by Ingo, use ioapic_idx consistently, instead of ioapic Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Naga Chumbalkar <nagananda.chumbalkar@hp.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/4E9542DC.3090509@oracle.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Yinghai Lu
Ingo Molnar
parent
cda417dd87
commit
6f50d45fae
@ -92,21 +92,21 @@ static struct ioapic {
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DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
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} ioapics[MAX_IO_APICS];
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#define mpc_ioapic_ver(id) ioapics[id].mp_config.apicver
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#define mpc_ioapic_ver(ioapic_idx) ioapics[ioapic_idx].mp_config.apicver
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int mpc_ioapic_id(int id)
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int mpc_ioapic_id(int ioapic_idx)
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{
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return ioapics[id].mp_config.apicid;
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return ioapics[ioapic_idx].mp_config.apicid;
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}
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unsigned int mpc_ioapic_addr(int id)
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unsigned int mpc_ioapic_addr(int ioapic_idx)
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{
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return ioapics[id].mp_config.apicaddr;
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return ioapics[ioapic_idx].mp_config.apicaddr;
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}
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struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int id)
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struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int ioapic_idx)
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{
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return &ioapics[id].gsi_config;
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return &ioapics[ioapic_idx].gsi_config;
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}
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int nr_ioapics;
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@ -712,13 +712,13 @@ int restore_ioapic_entries(void)
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/*
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* Find the IRQ entry number of a certain pin.
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*/
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static int find_irq_entry(int apic, int pin, int type)
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static int find_irq_entry(int ioapic_idx, int pin, int type)
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{
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int i;
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for (i = 0; i < mp_irq_entries; i++)
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if (mp_irqs[i].irqtype == type &&
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(mp_irqs[i].dstapic == mpc_ioapic_id(apic) ||
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(mp_irqs[i].dstapic == mpc_ioapic_id(ioapic_idx) ||
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mp_irqs[i].dstapic == MP_APIC_ALL) &&
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mp_irqs[i].dstirq == pin)
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return i;
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@ -757,12 +757,13 @@ static int __init find_isa_irq_apic(int irq, int type)
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(mp_irqs[i].srcbusirq == irq))
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break;
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}
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if (i < mp_irq_entries) {
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int apic;
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for(apic = 0; apic < nr_ioapics; apic++) {
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if (mpc_ioapic_id(apic) == mp_irqs[i].dstapic)
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return apic;
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}
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int ioapic_idx;
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic)
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return ioapic_idx;
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}
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return -1;
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@ -977,7 +978,7 @@ static int pin_2_irq(int idx, int apic, int pin)
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int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
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struct io_apic_irq_attr *irq_attr)
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{
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int apic, i, best_guess = -1;
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int ioapic_idx, i, best_guess = -1;
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apic_printk(APIC_DEBUG,
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"querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
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@ -990,8 +991,8 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
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for (i = 0; i < mp_irq_entries; i++) {
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int lbus = mp_irqs[i].srcbus;
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for (apic = 0; apic < nr_ioapics; apic++)
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if (mpc_ioapic_id(apic) == mp_irqs[i].dstapic ||
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic ||
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mp_irqs[i].dstapic == MP_APIC_ALL)
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break;
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@ -999,13 +1000,13 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
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!mp_irqs[i].irqtype &&
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(bus == lbus) &&
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(slot == ((mp_irqs[i].srcbusirq >> 2) & 0x1f))) {
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int irq = pin_2_irq(i, apic, mp_irqs[i].dstirq);
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int irq = pin_2_irq(i, ioapic_idx, mp_irqs[i].dstirq);
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if (!(apic || IO_APIC_IRQ(irq)))
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if (!(ioapic_idx || IO_APIC_IRQ(irq)))
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continue;
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if (pin == (mp_irqs[i].srcbusirq & 3)) {
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set_io_apic_irq_attr(irq_attr, apic,
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set_io_apic_irq_attr(irq_attr, ioapic_idx,
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mp_irqs[i].dstirq,
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irq_trigger(i),
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irq_polarity(i));
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@ -1016,7 +1017,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
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* best-guess fuzzy result for broken mptables.
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*/
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if (best_guess < 0) {
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set_io_apic_irq_attr(irq_attr, apic,
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set_io_apic_irq_attr(irq_attr, ioapic_idx,
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mp_irqs[i].dstirq,
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irq_trigger(i),
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irq_polarity(i));
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@ -1263,24 +1264,24 @@ static int setup_ir_ioapic_entry(int irq,
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{
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int index;
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struct irte irte;
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int apic_id = mpc_ioapic_id(attr->ioapic);
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struct intel_iommu *iommu = map_ioapic_to_ir(apic_id);
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int ioapic_id = mpc_ioapic_id(attr->ioapic);
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struct intel_iommu *iommu = map_ioapic_to_ir(ioapic_id);
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if (!iommu) {
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pr_warn("No mapping iommu for ioapic %d\n", apic_id);
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pr_warn("No mapping iommu for ioapic %d\n", ioapic_id);
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return -ENODEV;
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}
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index = alloc_irte(iommu, irq, 1);
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if (index < 0) {
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pr_warn("Failed to allocate IRTE for ioapic %d\n", apic_id);
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pr_warn("Failed to allocate IRTE for ioapic %d\n", ioapic_id);
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return -ENOMEM;
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}
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prepare_irte(&irte, vector, destination);
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/* Set source-id of interrupt request */
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set_ioapic_sid(&irte, apic_id);
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set_ioapic_sid(&irte, ioapic_id);
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modify_irte(irq, &irte);
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@ -1389,30 +1390,30 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
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ioapic_write_entry(attr->ioapic, attr->ioapic_pin, entry);
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}
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static bool __init io_apic_pin_not_connected(int idx, int apic_id, int pin)
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static bool __init io_apic_pin_not_connected(int idx, int ioapic_idx, int pin)
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{
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if (idx != -1)
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return false;
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apic_printk(APIC_VERBOSE, KERN_DEBUG " apic %d pin %d not connected\n",
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mpc_ioapic_id(apic_id), pin);
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mpc_ioapic_id(ioapic_idx), pin);
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return true;
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}
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static void __init __io_apic_setup_irqs(unsigned int apic_id)
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static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
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{
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int idx, node = cpu_to_node(0);
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struct io_apic_irq_attr attr;
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unsigned int pin, irq;
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for (pin = 0; pin < ioapics[apic_id].nr_registers; pin++) {
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idx = find_irq_entry(apic_id, pin, mp_INT);
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if (io_apic_pin_not_connected(idx, apic_id, pin))
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for (pin = 0; pin < ioapics[ioapic_idx].nr_registers; pin++) {
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idx = find_irq_entry(ioapic_idx, pin, mp_INT);
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if (io_apic_pin_not_connected(idx, ioapic_idx, pin))
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continue;
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irq = pin_2_irq(idx, apic_id, pin);
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irq = pin_2_irq(idx, ioapic_idx, pin);
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if ((apic_id > 0) && (irq > 16))
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if ((ioapic_idx > 0) && (irq > 16))
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continue;
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/*
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@ -1420,10 +1421,10 @@ static void __init __io_apic_setup_irqs(unsigned int apic_id)
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* installed and if it returns 1:
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*/
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if (apic->multi_timer_check &&
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apic->multi_timer_check(apic_id, irq))
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apic->multi_timer_check(ioapic_idx, irq))
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continue;
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set_io_apic_irq_attr(&attr, apic_id, pin, irq_trigger(idx),
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set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
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irq_polarity(idx));
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io_apic_setup_irq_pin(irq, node, &attr);
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@ -1432,12 +1433,12 @@ static void __init __io_apic_setup_irqs(unsigned int apic_id)
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static void __init setup_IO_APIC_irqs(void)
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{
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unsigned int apic_id;
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unsigned int ioapic_idx;
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apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
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for (apic_id = 0; apic_id < nr_ioapics; apic_id++)
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__io_apic_setup_irqs(apic_id);
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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__io_apic_setup_irqs(ioapic_idx);
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}
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/*
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@ -1447,28 +1448,28 @@ static void __init setup_IO_APIC_irqs(void)
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*/
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void setup_IO_APIC_irq_extra(u32 gsi)
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{
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int apic_id = 0, pin, idx, irq, node = cpu_to_node(0);
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int ioapic_idx = 0, pin, idx, irq, node = cpu_to_node(0);
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struct io_apic_irq_attr attr;
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/*
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* Convert 'gsi' to 'ioapic.pin'.
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*/
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apic_id = mp_find_ioapic(gsi);
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if (apic_id < 0)
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ioapic_idx = mp_find_ioapic(gsi);
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if (ioapic_idx < 0)
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return;
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pin = mp_find_ioapic_pin(apic_id, gsi);
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idx = find_irq_entry(apic_id, pin, mp_INT);
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pin = mp_find_ioapic_pin(ioapic_idx, gsi);
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idx = find_irq_entry(ioapic_idx, pin, mp_INT);
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if (idx == -1)
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return;
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irq = pin_2_irq(idx, apic_id, pin);
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irq = pin_2_irq(idx, ioapic_idx, pin);
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/* Only handle the non legacy irqs on secondary ioapics */
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if (apic_id == 0 || irq < NR_IRQS_LEGACY)
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if (ioapic_idx == 0 || irq < NR_IRQS_LEGACY)
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return;
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set_io_apic_irq_attr(&attr, apic_id, pin, irq_trigger(idx),
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set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
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irq_polarity(idx));
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io_apic_setup_irq_pin_once(irq, node, &attr);
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@ -1477,8 +1478,8 @@ void setup_IO_APIC_irq_extra(u32 gsi)
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/*
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* Set up the timer pin, possibly with the 8259A-master behind.
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*/
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static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
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int vector)
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static void __init setup_timer_IRQ0_pin(unsigned int ioapic_idx,
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unsigned int pin, int vector)
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{
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struct IO_APIC_route_entry entry;
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@ -1509,10 +1510,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
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/*
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* Add it to the IO-APIC irq-routing table:
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*/
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ioapic_write_entry(apic_id, pin, entry);
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ioapic_write_entry(ioapic_idx, pin, entry);
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}
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__apicdebuginit(void) print_IO_APIC(int apic)
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__apicdebuginit(void) print_IO_APIC(int ioapic_idx)
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{
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int i;
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union IO_APIC_reg_00 reg_00;
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@ -1522,16 +1523,16 @@ __apicdebuginit(void) print_IO_APIC(int apic)
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unsigned long flags;
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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reg_00.raw = io_apic_read(apic, 0);
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reg_01.raw = io_apic_read(apic, 1);
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reg_00.raw = io_apic_read(ioapic_idx, 0);
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reg_01.raw = io_apic_read(ioapic_idx, 1);
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if (reg_01.bits.version >= 0x10)
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reg_02.raw = io_apic_read(apic, 2);
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reg_02.raw = io_apic_read(ioapic_idx, 2);
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if (reg_01.bits.version >= 0x20)
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reg_03.raw = io_apic_read(apic, 3);
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reg_03.raw = io_apic_read(ioapic_idx, 3);
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raw_spin_unlock_irqrestore(&ioapic_lock, flags);
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printk("\n");
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printk(KERN_DEBUG "IO APIC #%d......\n", mpc_ioapic_id(apic));
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printk(KERN_DEBUG "IO APIC #%d......\n", mpc_ioapic_id(ioapic_idx));
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printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw);
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printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID);
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printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type);
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@ -1581,7 +1582,7 @@ __apicdebuginit(void) print_IO_APIC(int apic)
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struct IO_APIC_route_entry entry;
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struct IR_IO_APIC_route_entry *ir_entry;
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entry = ioapic_read_entry(apic, i);
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entry = ioapic_read_entry(ioapic_idx, i);
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ir_entry = (struct IR_IO_APIC_route_entry *) &entry;
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printk(KERN_DEBUG " %02x %04X ",
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i,
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@ -1602,7 +1603,7 @@ __apicdebuginit(void) print_IO_APIC(int apic)
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} else {
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struct IO_APIC_route_entry entry;
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entry = ioapic_read_entry(apic, i);
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entry = ioapic_read_entry(ioapic_idx, i);
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printk(KERN_DEBUG " %02x %02X ",
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i,
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entry.dest
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@ -1624,14 +1625,15 @@ __apicdebuginit(void) print_IO_APIC(int apic)
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__apicdebuginit(void) print_IO_APICs(void)
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{
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int apic, i;
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int ioapic_idx;
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struct irq_cfg *cfg;
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unsigned int irq;
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printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
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for (i = 0; i < nr_ioapics; i++)
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
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mpc_ioapic_id(i), ioapics[i].nr_registers);
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mpc_ioapic_id(ioapic_idx),
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ioapics[ioapic_idx].nr_registers);
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/*
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* We are a bit conservative about what we expect. We have to
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@ -1639,8 +1641,8 @@ __apicdebuginit(void) print_IO_APICs(void)
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*/
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printk(KERN_INFO "testing the IO APIC.......................\n");
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for (apic = 0; apic < nr_ioapics; apic++)
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print_IO_APIC(apic);
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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print_IO_APIC(ioapic_idx);
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printk(KERN_DEBUG "IRQ to pin mappings:\n");
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for_each_active_irq(irq) {
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@ -1977,7 +1979,7 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
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{
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union IO_APIC_reg_00 reg_00;
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physid_mask_t phys_id_present_map;
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int apic_id;
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int ioapic_idx;
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int i;
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unsigned char old_id;
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unsigned long flags;
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@ -1991,21 +1993,20 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
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/*
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* Set the IOAPIC ID to the value stored in the MPC table.
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*/
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for (apic_id = 0; apic_id < nr_ioapics; apic_id++) {
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++) {
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/* Read the register 0 value */
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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reg_00.raw = io_apic_read(apic_id, 0);
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reg_00.raw = io_apic_read(ioapic_idx, 0);
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raw_spin_unlock_irqrestore(&ioapic_lock, flags);
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old_id = mpc_ioapic_id(apic_id);
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old_id = mpc_ioapic_id(ioapic_idx);
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if (mpc_ioapic_id(apic_id) >= get_physical_broadcast()) {
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if (mpc_ioapic_id(ioapic_idx) >= get_physical_broadcast()) {
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printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
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apic_id, mpc_ioapic_id(apic_id));
|
||||
ioapic_idx, mpc_ioapic_id(ioapic_idx));
|
||||
printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
|
||||
reg_00.bits.ID);
|
||||
ioapics[apic_id].mp_config.apicid = reg_00.bits.ID;
|
||||
ioapics[ioapic_idx].mp_config.apicid = reg_00.bits.ID;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2014,9 +2015,9 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
|
||||
* 'stuck on smp_invalidate_needed IPI wait' messages.
|
||||
*/
|
||||
if (apic->check_apicid_used(&phys_id_present_map,
|
||||
mpc_ioapic_id(apic_id))) {
|
||||
mpc_ioapic_id(ioapic_idx))) {
|
||||
printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
|
||||
apic_id, mpc_ioapic_id(apic_id));
|
||||
ioapic_idx, mpc_ioapic_id(ioapic_idx));
|
||||
for (i = 0; i < get_physical_broadcast(); i++)
|
||||
if (!physid_isset(i, phys_id_present_map))
|
||||
break;
|
||||
@ -2025,14 +2026,14 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
|
||||
printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
|
||||
i);
|
||||
physid_set(i, phys_id_present_map);
|
||||
ioapics[apic_id].mp_config.apicid = i;
|
||||
ioapics[ioapic_idx].mp_config.apicid = i;
|
||||
} else {
|
||||
physid_mask_t tmp;
|
||||
apic->apicid_to_cpu_present(mpc_ioapic_id(apic_id),
|
||||
apic->apicid_to_cpu_present(mpc_ioapic_id(ioapic_idx),
|
||||
&tmp);
|
||||
apic_printk(APIC_VERBOSE, "Setting %d in the "
|
||||
"phys_id_present_map\n",
|
||||
mpc_ioapic_id(apic_id));
|
||||
mpc_ioapic_id(ioapic_idx));
|
||||
physids_or(phys_id_present_map, phys_id_present_map, tmp);
|
||||
}
|
||||
|
||||
@ -2040,35 +2041,35 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
|
||||
* We need to adjust the IRQ routing table
|
||||
* if the ID changed.
|
||||
*/
|
||||
if (old_id != mpc_ioapic_id(apic_id))
|
||||
if (old_id != mpc_ioapic_id(ioapic_idx))
|
||||
for (i = 0; i < mp_irq_entries; i++)
|
||||
if (mp_irqs[i].dstapic == old_id)
|
||||
mp_irqs[i].dstapic
|
||||
= mpc_ioapic_id(apic_id);
|
||||
= mpc_ioapic_id(ioapic_idx);
|
||||
|
||||
/*
|
||||
* Update the ID register according to the right value
|
||||
* from the MPC table if they are different.
|
||||
*/
|
||||
if (mpc_ioapic_id(apic_id) == reg_00.bits.ID)
|
||||
if (mpc_ioapic_id(ioapic_idx) == reg_00.bits.ID)
|
||||
continue;
|
||||
|
||||
apic_printk(APIC_VERBOSE, KERN_INFO
|
||||
"...changing IO-APIC physical APIC ID to %d ...",
|
||||
mpc_ioapic_id(apic_id));
|
||||
mpc_ioapic_id(ioapic_idx));
|
||||
|
||||
reg_00.bits.ID = mpc_ioapic_id(apic_id);
|
||||
reg_00.bits.ID = mpc_ioapic_id(ioapic_idx);
|
||||
raw_spin_lock_irqsave(&ioapic_lock, flags);
|
||||
io_apic_write(apic_id, 0, reg_00.raw);
|
||||
io_apic_write(ioapic_idx, 0, reg_00.raw);
|
||||
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
|
||||
/*
|
||||
* Sanity check
|
||||
*/
|
||||
raw_spin_lock_irqsave(&ioapic_lock, flags);
|
||||
reg_00.raw = io_apic_read(apic_id, 0);
|
||||
reg_00.raw = io_apic_read(ioapic_idx, 0);
|
||||
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
if (reg_00.bits.ID != mpc_ioapic_id(apic_id))
|
||||
if (reg_00.bits.ID != mpc_ioapic_id(ioapic_idx))
|
||||
printk("could not set ID!\n");
|
||||
else
|
||||
apic_printk(APIC_VERBOSE, " ok.\n");
|
||||
@ -2968,27 +2969,26 @@ static int __init io_apic_bug_finalize(void)
|
||||
|
||||
late_initcall(io_apic_bug_finalize);
|
||||
|
||||
static void resume_ioapic_id(int ioapic_id)
|
||||
static void resume_ioapic_id(int ioapic_idx)
|
||||
{
|
||||
unsigned long flags;
|
||||
union IO_APIC_reg_00 reg_00;
|
||||
|
||||
|
||||
raw_spin_lock_irqsave(&ioapic_lock, flags);
|
||||
reg_00.raw = io_apic_read(ioapic_id, 0);
|
||||
if (reg_00.bits.ID != mpc_ioapic_id(ioapic_id)) {
|
||||
reg_00.bits.ID = mpc_ioapic_id(ioapic_id);
|
||||
io_apic_write(ioapic_id, 0, reg_00.raw);
|
||||
reg_00.raw = io_apic_read(ioapic_idx, 0);
|
||||
if (reg_00.bits.ID != mpc_ioapic_id(ioapic_idx)) {
|
||||
reg_00.bits.ID = mpc_ioapic_id(ioapic_idx);
|
||||
io_apic_write(ioapic_idx, 0, reg_00.raw);
|
||||
}
|
||||
raw_spin_unlock_irqrestore(&ioapic_lock, flags);
|
||||
}
|
||||
|
||||
static void ioapic_resume(void)
|
||||
{
|
||||
int ioapic_id;
|
||||
int ioapic_idx;
|
||||
|
||||
for (ioapic_id = nr_ioapics - 1; ioapic_id >= 0; ioapic_id--)
|
||||
resume_ioapic_id(ioapic_id);
|
||||
for (ioapic_idx = nr_ioapics - 1; ioapic_idx >= 0; ioapic_idx--)
|
||||
resume_ioapic_id(ioapic_idx);
|
||||
|
||||
restore_ioapic_entries();
|
||||
}
|
||||
@ -3597,18 +3597,18 @@ io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
|
||||
int io_apic_setup_irq_pin_once(unsigned int irq, int node,
|
||||
struct io_apic_irq_attr *attr)
|
||||
{
|
||||
unsigned int id = attr->ioapic, pin = attr->ioapic_pin;
|
||||
unsigned int ioapic_idx = attr->ioapic, pin = attr->ioapic_pin;
|
||||
int ret;
|
||||
|
||||
/* Avoid redundant programming */
|
||||
if (test_bit(pin, ioapics[id].pin_programmed)) {
|
||||
if (test_bit(pin, ioapics[ioapic_idx].pin_programmed)) {
|
||||
pr_debug("Pin %d-%d already programmed\n",
|
||||
mpc_ioapic_id(id), pin);
|
||||
mpc_ioapic_id(ioapic_idx), pin);
|
||||
return 0;
|
||||
}
|
||||
ret = io_apic_setup_irq_pin(irq, node, attr);
|
||||
if (!ret)
|
||||
set_bit(pin, ioapics[id].pin_programmed);
|
||||
set_bit(pin, ioapics[ioapic_idx].pin_programmed);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user