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ARM: bcm2835: SoC driver updates
The bcm2835 clock driver is enhanced to allow fixed clocks to be probed from device tree. A system power-off implementation is added. This branch is based on v3.8-rc3. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRB2t5AAoJEJuNpwkmVCGcGpEP/RCuccnBem2L76YR357qtes+ eRUUyYVeway5W7gaM4h0L+QJfSSd+KxzvEWdrrNHSFXN+fpyLdGVz3R7uXn5m3Rs ffrxyVEERNB+g3ASb5NOlDM29sSsakFX92EOGlR/ZPbgjLpiqBtzOu9I4NouZtSk WxOWhZQ9xA2gyV238LkD+5OUmbu19GayXex8j123SMcIiM45JCvAeBtr9WykcXiW DliXStZT73t/cL/t+TeqRX6cBfV8XLKwlh95vl3zBSwri2vjX8nTpuNgpKqByass /j7c7XnZYUTmtvxPqSK3I20jNqpzWCmpP7jjcdp05belKr3c6JQpgaFtjdzpQ44Y AbXTlHXuQC78jK0utE+ZE7gGt8WR0l+p4H0TLUt+3k5ny+TsVMFDpfVZlbqURr6k iBLFgNCbpCDH+UXoLQb4HiQg5QaMKtDuQNztRJWwDAuyXMKWPN3alv9lGP/FUrIy oGqZtthN9Dds6xLZOaZqVO/O5LJF9HweDM01PikhgK9jwiBZVTcrXWQHlb/IH/nN beBfqaH8c0c/+QwQNSR4vSVS2b3r4u/mxUeufqcgtvbNfys9PRzntvV92qgEs/ma tR6zKxvQADxlhi3vrRkC39L/zcMPWEDcyuqdAQ8FW6/4yljEUW3mHXY/H6eVkXCg xPCSzREtfVcN5ULXxYKP =Up/B -----END PGP SIGNATURE----- Merge tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc From Stephen Warren: ARM: bcm2835: SoC driver updates The bcm2835 clock driver is enhanced to allow fixed clocks to be probed from device tree. A system power-off implementation is added. This branch is based on v3.8-rc3. * tag 'bcm2835-for-3.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi: ARM: bcm2835: add a pm_power_off implementation clk: bcm2835: probe for fixed-clock in device tree Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
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@ -26,11 +26,13 @@
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#include <mach/bcm2835_soc.h>
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#define PM_RSTC 0x1c
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#define PM_RSTS 0x20
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#define PM_WDOG 0x24
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#define PM_PASSWORD 0x5a000000
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#define PM_RSTC_WRCFG_MASK 0x00000030
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#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
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#define PM_RSTS_HADWRH_SET 0x00000040
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static void __iomem *wdt_regs;
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@ -67,6 +69,29 @@ static void bcm2835_restart(char mode, const char *cmd)
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mdelay(1);
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}
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/*
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* We can't really power off, but if we do the normal reset scheme, and
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* indicate to bootcode.bin not to reboot, then most of the chip will be
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* powered off.
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*/
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static void bcm2835_power_off(void)
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{
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u32 val;
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/*
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* We set the watchdog hard reset bit here to distinguish this reset
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* from the normal (full) reset. bootcode.bin will not reboot after a
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* hard reset.
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*/
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val = readl_relaxed(wdt_regs + PM_RSTS);
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val &= ~PM_RSTC_WRCFG_MASK;
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val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;
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writel_relaxed(val, wdt_regs + PM_RSTS);
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/* Continue with normal reset mechanism */
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bcm2835_restart(0, "");
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}
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static struct map_desc io_map __initdata = {
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.virtual = BCM2835_PERIPH_VIRT,
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.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
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@ -84,6 +109,9 @@ static void __init bcm2835_init(void)
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int ret;
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bcm2835_setup_restart();
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if (wdt_regs)
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pm_power_off = bcm2835_power_off;
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bcm2835_init_clocks();
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ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
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@ -20,6 +20,13 @@
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#include <linux/clk-provider.h>
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#include <linux/clkdev.h>
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#include <linux/clk/bcm2835.h>
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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static const __initconst struct of_device_id clk_match[] = {
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{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
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{ }
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};
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/*
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* These are fixed clocks. They're probably not all root clocks and it may
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@ -56,4 +63,6 @@ void __init bcm2835_init_clocks(void)
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ret = clk_register_clkdev(clk, NULL, "20215000.uart");
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if (ret)
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pr_err("uart1_pclk alias not registered\n");
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of_clk_init(clk_match);
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}
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