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Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: Revert "drm/nvc0: recognise 0xdX chipsets as NV_C0" drm/radeon/kms: fix typo in cayman reg offset drm/radeon/kms: use correct reg on fusion when reading back mem config
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commit
6e139047e2
@ -371,7 +371,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
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engine->vram.flags_valid = nv50_vram_flags_valid;
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break;
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case 0xC0:
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case 0xD0:
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engine->instmem.init = nvc0_instmem_init;
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engine->instmem.takedown = nvc0_instmem_takedown;
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engine->instmem.suspend = nvc0_instmem_suspend;
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@ -923,7 +922,6 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
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dev_priv->card_type = NV_50;
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break;
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case 0xc0:
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case 0xd0:
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dev_priv->card_type = NV_C0;
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break;
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default:
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@ -2248,7 +2248,10 @@ int evergreen_mc_init(struct radeon_device *rdev)
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/* Get VRAM informations */
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rdev->mc.vram_is_ddr = true;
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tmp = RREG32(MC_ARB_RAMCFG);
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if (rdev->flags & RADEON_IS_IGP)
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tmp = RREG32(FUS_MC_ARB_RAMCFG);
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else
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tmp = RREG32(MC_ARB_RAMCFG);
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if (tmp & CHANSIZE_OVERRIDE) {
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chansize = 16;
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} else if (tmp & CHANSIZE_MASK) {
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@ -320,7 +320,7 @@
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#define CGTS_USER_TCC_DISABLE 0x914C
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#define TCC_DISABLE_MASK 0xFFFF0000
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#define TCC_DISABLE_SHIFT 16
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#define CGTS_SM_CTRL_REG 0x915C
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#define CGTS_SM_CTRL_REG 0x9150
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#define OVERRIDE (1 << 21)
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#define TA_CNTL_AUX 0x9508
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