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ARM: 8670/1: V7M: Do not corrupt vector table around v7m_invalidate_l1 call

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We save/restore registers around v7m_invalidate_l1 to address pointed
by r12, which is vector table, so the first eight entries are
overwritten with a garbage. We already have stack setup at that stage,
so use it to save/restore register.

Fixes: 6a8146f420 ("ARM: 8609/1: V7M: Add support for the Cortex-M7 processor")
Cc: <stable@vger.kernel.org>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This commit is contained in:
Vladimir Murzin 2017-04-24 10:40:48 +01:00 committed by Russell King
parent 3872fe83a2
commit 6d80594936
1 changed files with 2 additions and 2 deletions
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4
arch/arm/mm/proc-v7m.S
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@ -147,10 +147,10 @@ __v7m_setup_cont:
@ Configure caches (if implemented) @ Configure caches (if implemented)
teq r8, #0 teq r8, #0
stmneia r12, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6 stmneia sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
blne v7m_invalidate_l1 blne v7m_invalidate_l1
teq r8, #0 @ re-evalutae condition teq r8, #0 @ re-evalutae condition
ldmneia r12, {r0-r6, lr} ldmneia sp, {r0-r6, lr}
@ Configure the System Control Register to ensure 8-byte stack alignment @ Configure the System Control Register to ensure 8-byte stack alignment
@ Note the STKALIGN bit is either RW or RAO. @ Note the STKALIGN bit is either RW or RAO.