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Samsung mach/soc update for v4.8:

Browse Source 
1. Minor cleanups.
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Merge tag 'samsung-soc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/cleanup

Samsung mach/soc update for v4.8:
1. Minor cleanups.

* tag 'samsung-soc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: s3c24xx: Sort cpufreq tables
  ARM: SAMSUNG: Fix typos

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-06-13 14:24:39 -07:00
commit 6c8266009c
13 changed files with 14 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-s3c24xx/include/mach/regs-gpio.h
View File

@ -520,7 +520,7 @@
#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C)
#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90)
/* interrupt filtering conrrol for EINT16..EINT23 */
/* interrupt filtering control for EINT16..EINT23 */
#define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94)
#define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98)
#define S3C2410_EINFLT2 S3C2410_GPIOREG(0x9C)

2
arch/arm/mach-s3c24xx/iotiming-s3c2410.c
View File

@ -423,7 +423,7 @@ void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
* @timings: The IO timing information to fill out.
*
* Calculate the @timings timing information from the current frequency
* information in @cfg, and the new frequency configur
* information in @cfg, and the new frequency configuration
* through all the IO banks, reading the state and then updating @iot
* as necessary.
*

2
arch/arm/mach-s3c24xx/mach-n30.c
View File

@ -522,7 +522,7 @@ static void __init n30_hwinit(void)
*
* The pull ups for H6/H7 are enabled on N30 but not on the
* N35/PiN. I suppose is useful for a budget model of the N30
* with no bluetooh. It doesn't hurt to have the pull ups
* with no bluetooth. It doesn't hurt to have the pull ups
* enabled on the N35, so leave them enabled for all models.
*/
__raw_writel(0x0028aaaa, S3C2410_GPHCON);

2
arch/arm/mach-s3c24xx/mach-osiris-dvs.c
View File

@ -143,7 +143,7 @@ static int osiris_dvs_remove(struct platform_device *pdev)
return 0;
}
/* the CONFIG_PM block is so small, it isn't worth actaully compiling it
/* the CONFIG_PM block is so small, it isn't worth actually compiling it
* out if the configuration isn't set. */
static int osiris_dvs_suspend(struct device *dev)

3
arch/arm/mach-s3c24xx/pll-s3c2410.c
View File

@ -32,11 +32,12 @@
#include <plat/cpu.h>
#include <plat/cpu-freq-core.h>
/* This array should be sorted in ascending order of the frequencies */
static struct cpufreq_frequency_table pll_vals_12MHz[] = {
{ .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), },
{ .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), },
{ .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
{ .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), },
{ .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
{ .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), },
{ .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), },
{ .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), },

1
arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
View File

@ -20,6 +20,7 @@
#include <plat/cpu.h>
#include <plat/cpu-freq-core.h>
/* This array should be sorted in ascending order of the frequencies */
static struct cpufreq_frequency_table s3c2440_plls_12[] = {
{ .frequency = 75000000, .driver_data = PLLVAL(0x75, 3, 3), }, /* FVco 600.000000 */
{ .frequency = 80000000, .driver_data = PLLVAL(0x98, 4, 3), }, /* FVco 640.000000 */

1
arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
View File

@ -20,6 +20,7 @@
#include <plat/cpu.h>
#include <plat/cpu-freq-core.h>
/* This array should be sorted in ascending order of the frequencies */
static struct cpufreq_frequency_table s3c2440_plls_169344[] = {
{ .frequency = 78019200, .driver_data = PLLVAL(121, 5, 3), }, /* FVco 624.153600 */
{ .frequency = 84067200, .driver_data = PLLVAL(131, 5, 3), }, /* FVco 672.537600 */

2
arch/arm/mach-s3c64xx/include/mach/map.h
View File

@ -99,7 +99,7 @@
#define S3C64XX_PA_USB_HSPHY (0x7C100000)
/* compatibiltiy defines. */
/* compatibility defines. */
#define S3C_PA_TIMER S3C64XX_PA_TIMER
#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0
#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1

2
arch/arm/plat-samsung/include/plat/cpu-freq-core.h
View File

@ -39,7 +39,7 @@ struct s3c2410_iobank_timing {
unsigned int tacs;
unsigned int tcos;
unsigned int tacc;
unsigned int tcoh; /* nCS hold afrer nOE/nWE */
unsigned int tcoh; /* nCS hold after nOE/nWE */
unsigned int tcah; /* Address hold after nCS */
unsigned char nwait_en; /* nWait enabled for bank. */
};

2
arch/arm/plat-samsung/include/plat/fb-s3c2410.h
View File

@ -48,7 +48,7 @@ struct s3c2410fb_display {
struct s3c2410fb_mach_info {
struct s3c2410fb_display *displays; /* attached diplays info */
struct s3c2410fb_display *displays; /* attached displays info */
unsigned num_displays; /* number of defined displays */
unsigned default_display;

2
arch/arm/plat-samsung/include/plat/gpio-cfg.h
View File

@ -35,7 +35,7 @@ struct samsung_gpio_chip;
* struct samsung_gpio_cfg GPIO configuration
* @cfg_eint: Configuration setting when used for external interrupt source
* @get_pull: Read the current pull configuration for the GPIO
* @set_pull: Set the current pull configuraiton for the GPIO
* @set_pull: Set the current pull configuration for the GPIO
* @set_config: Set the current configuration for the GPIO
* @get_config: Read the current configuration for the GPIO
*

2
arch/arm/plat-samsung/pm-check.c
View File

@ -5,7 +5,7 @@
* http://armlinux.simtec.co.uk
* Ben Dooks <ben@simtec.co.uk>
*
* S3C Power Mangament - suspend/resume memory corruptiuon check.
* S3C Power Mangament - suspend/resume memory corruption check.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as

2
arch/arm/plat-samsung/watchdog-reset.c
View File

@ -3,7 +3,7 @@
* Copyright (c) 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Coyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
* Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
*
* Watchdog reset support for Samsung SoCs.
*