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ARM: sun7i: Add clock indices
The A20 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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@ -267,6 +267,19 @@
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compatible = "allwinner,sun7i-a20-ahb-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb>;
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clock-indices = <0>, <1>,
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<2>, <3>, <4>,
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<5>, <6>, <7>, <8>,
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<9>, <10>, <11>, <12>,
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<13>, <14>, <16>,
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<17>, <18>, <20>, <21>,
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<22>, <23>, <25>,
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<28>, <32>, <33>, <34>,
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<35>, <36>, <37>, <40>,
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<41>, <42>, <43>,
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<44>, <45>, <46>,
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<47>, <49>, <50>,
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<52>;
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clock-output-names = "ahb_usb0", "ahb_ehci0",
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"ahb_ohci0", "ahb_ehci1", "ahb_ohci1",
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"ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
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@ -295,6 +308,10 @@
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compatible = "allwinner,sun7i-a20-apb0-gates-clk";
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reg = <0x01c20068 0x4>;
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clocks = <&apb0>;
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clock-indices = <0>, <1>,
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<2>, <3>, <4>,
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<5>, <6>, <7>,
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<8>, <10>;
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clock-output-names = "apb0_codec", "apb0_spdif",
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"apb0_ac97", "apb0_iis0", "apb0_iis1",
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"apb0_pio", "apb0_ir0", "apb0_ir1",
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@ -314,6 +331,12 @@
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compatible = "allwinner,sun7i-a20-apb1-gates-clk";
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reg = <0x01c2006c 0x4>;
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clocks = <&apb1>;
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clock-indices = <0>, <1>,
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<2>, <3>, <4>,
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<5>, <6>, <7>,
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<15>, <16>, <17>,
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<18>, <19>, <20>,
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<21>, <22>, <23>;
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clock-output-names = "apb1_i2c0", "apb1_i2c1",
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"apb1_i2c2", "apb1_i2c3", "apb1_can",
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"apb1_scr", "apb1_ps20", "apb1_ps21",
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