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ASoC: rt1015: modify calibration sequence for better performance
New calibration sequence to fix power issue in idle state. Signed-off-by: Jack Yu <jack.yu@realtek.com> Link: https://lore.kernel.org/r/ec66399502514edbb1de3cf9bff08b1d@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -497,40 +497,20 @@ static void rt1015_calibrate(struct rt1015_priv *rt1015)
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snd_soc_dapm_mutex_lock(&component->dapm);
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regcache_cache_bypass(regmap, true);
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regmap_write(regmap, RT1015_PWR9, 0xAA60);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0089);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008A);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008C);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008D);
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regmap_write(regmap, RT1015_PWR4, 0x80B2);
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regmap_write(regmap, RT1015_CLASSD_SEQ, 0x5797);
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regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2100);
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regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0100);
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regmap_write(regmap, RT1015_PWR5, 0x2175);
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regmap_write(regmap, RT1015_MIXER1, 0x005D);
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regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1);
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regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12F7);
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regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x1205);
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msleep(200);
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regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2000);
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regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0180);
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regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x00A1);
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regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x0A05);
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msleep(200);
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regmap_write(regmap, RT1015_CLK_DET, 0x0000);
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regmap_write(regmap, RT1015_PWR4, 0x00B2);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0009);
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msleep(100);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000A);
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msleep(100);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000C);
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msleep(100);
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regmap_write(regmap, RT1015_CLSD_INTERNAL8, 0x2028);
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regmap_write(regmap, RT1015_CLSD_INTERNAL9, 0x0140);
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regmap_write(regmap, RT1015_PWR5, 0x0175);
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regmap_write(regmap, RT1015_CLSD_INTERNAL1, 0x1721);
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regmap_write(regmap, RT1015_CLASSD_SEQ, 0x570E);
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regmap_write(regmap, RT1015_MIXER1, 0x203D);
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regmap_write(regmap, RT1015_DC_CALIB_CLSD1, 0x5A01);
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regmap_write(regmap, RT1015_CLSD_INTERNAL2, 0x12FF);
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regmap_write(regmap, RT1015_GAT_BOOST, 0x0eFE);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x008E);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0088);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x000D);
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msleep(300);
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regmap_write(regmap, RT1015_PWR_STATE_CTRL, 0x0008);
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regmap_write(regmap, RT1015_SYS_RST1, 0x05F5);
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regmap_write(regmap, RT1015_SYS_RST2, 0x0b9a);
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regcache_cache_bypass(regmap, false);
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regcache_mark_dirty(regmap);
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