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Samsung mach/soc changes for v4.20, second round
1. Disable SAMSUNG_PM_CHECK Kconfig feature incompatible with Exynos. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAlu+QO0QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD10v9D/44hJAVX+pYxf1bsG7kxJbLAyTDoMwue2vD /+pw11/hiiRhRkVpaJnujsGEq6rDiEYMro8dzOZoVDzrPbIG1DoCfn3D5wmEWxKg pxooOPjkSk+r+6Lo4Cb1f/UhBMmVcXS1IvbWP2unoXBQBrO49QnFh2apmGrC9Bgz INhQS4of2RehUgJoZHUvUULaAF2/1mOsbMvUGC+4SF9ylUTI3YLn0SbLV4ypOv11 hm4ZctWmactsugkJqFYE64duU2chXrotcxZsjZdRYdx4nSYO4BGRuCsJ7YiTdqt+ ynBftKoVDau6TcBI8CGTNnfAEnXKh4S4ejhBl5sPlHDtlGcPHLcmQ6JfGeatM3Gs Yn+fwnbIK/n3XN8KURIHuR8NdUdYoQN2OORJsV3ISLjL7azsNu4IDUV4xgOzagvO OU49rBkoozQpAYn+4zJiuY3uWrZFRcdbLe1v01ZPzWSmsGpC86x1WiwJLFeYoPpN PViNXZEIZBEDwpZDxn5E0F/zbJO+J9y8/H+RS7MaEYkpAZmH6E9HgIUReD57EgRg fcxjPFTzb9LXIHO+j0zhyyb3crFkmg+jaQHXhMFQtExLvhTgAoC29q9fvpyNdjft rwnSZp+c5K+lOBDCLTtV8VUHLpEee2+JiWEJVTguUiLnnevd9Jb4GP3pv2dY84Fl 11hfmHvgMg== =U/Fc -----END PGP SIGNATURE----- Merge tag 'samsung-soc-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc Samsung mach/soc changes for v4.20, second round 1. Disable SAMSUNG_PM_CHECK Kconfig feature incompatible with Exynos. * tag 'samsung-soc-4.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms ARM: s3c24xx: Restore proper usage of pr_info/pr_cont ARM: s3c24xx: Correct SD card write protect detection on Mini2440 ARM: s3c24xx: Consistently use tab for indenting member assignments ARM: s3c24xx: formatting cleanup in mach-mini2440.c ARM: s3c24xx: Remove empty gta02_pmu children probe ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAM ARM: exynos: Store Exynos5420 register state in one variable Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
6ba3f37f62
@ -26,6 +26,7 @@ Offset Value Purpose
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0x20 0xfcba0d10 (Magic cookie) AFTR
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0x24 exynos_cpu_resume_ns AFTR
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0x28 + 4*cpu 0x8 (Magic cookie, Exynos3250) AFTR
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0x28 0x0 or last value during resume (Exynos542x) System suspend
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2. Secure mode
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@ -110,6 +110,7 @@ void exynos_firmware_init(void);
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#define EXYNOS_SLEEP_MAGIC 0x00000bad
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#define EXYNOS_AFTR_MAGIC 0xfcba0d10
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bool __init exynos_secure_firmware_available(void);
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void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
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void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
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@ -185,7 +185,7 @@ static void exynos_l2_configure(const struct l2x0_regs *regs)
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exynos_smc(SMC_CMD_L2X0SETUP2, regs->pwr_ctrl, regs->aux_ctrl, 0);
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}
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void __init exynos_firmware_init(void)
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bool __init exynos_secure_firmware_available(void)
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{
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struct device_node *nd;
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const __be32 *addr;
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@ -193,14 +193,22 @@ void __init exynos_firmware_init(void)
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nd = of_find_compatible_node(NULL, NULL,
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"samsung,secure-firmware");
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if (!nd)
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return;
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return false;
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addr = of_get_address(nd, 0, NULL, NULL);
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if (!addr) {
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pr_err("%s: No address specified.\n", __func__);
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return;
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return false;
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}
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return true;
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}
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void __init exynos_firmware_init(void)
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{
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if (!exynos_secure_firmware_available())
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return;
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pr_info("Running under secure firmware.\n");
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register_firmware_ops(&exynos_firmware_ops);
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@ -59,10 +59,15 @@ struct exynos_pm_data {
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int (*cpu_suspend)(unsigned long);
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};
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static const struct exynos_pm_data *pm_data __ro_after_init;
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/* Used only on Exynos542x/5800 */
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struct exynos_pm_state {
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int cpu_state;
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unsigned int pmu_spare3;
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void __iomem *sysram_base;
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};
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static int exynos5420_cpu_state;
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static unsigned int exynos_pmu_spare3;
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static const struct exynos_pm_data *pm_data __ro_after_init;
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static struct exynos_pm_state pm_state;
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/*
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* GIC wake-up support
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@ -257,7 +262,7 @@ static int exynos5420_cpu_suspend(unsigned long arg)
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unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
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unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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writel_relaxed(0x0, sysram_base_addr + EXYNOS5420_CPU_STATE);
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writel_relaxed(0x0, pm_state.sysram_base + EXYNOS5420_CPU_STATE);
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if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM)) {
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mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
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@ -321,7 +326,7 @@ static void exynos5420_pm_prepare(void)
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/* Set wake-up mask registers */
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exynos_pm_set_wakeup_mask();
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exynos_pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3);
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pm_state.pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3);
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/*
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* The cpu state needs to be saved and restored so that the
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* secondary CPUs will enter low power start. Though the U-Boot
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@ -329,8 +334,8 @@ static void exynos5420_pm_prepare(void)
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* needs to restore it back in case, the primary cpu fails to
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* suspend for any reason.
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*/
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exynos5420_cpu_state = readl_relaxed(sysram_base_addr +
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EXYNOS5420_CPU_STATE);
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pm_state.cpu_state = readl_relaxed(pm_state.sysram_base +
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EXYNOS5420_CPU_STATE);
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exynos_pm_enter_sleep_mode();
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@ -448,8 +453,8 @@ static void exynos5420_pm_resume(void)
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EXYNOS5_ARM_CORE0_SYS_PWR_REG);
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/* Restore the sysram cpu state register */
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writel_relaxed(exynos5420_cpu_state,
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sysram_base_addr + EXYNOS5420_CPU_STATE);
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writel_relaxed(pm_state.cpu_state,
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pm_state.sysram_base + EXYNOS5420_CPU_STATE);
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pmu_raw_writel(EXYNOS5420_USE_STANDBY_WFI_ALL,
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S5P_CENTRAL_SEQ_OPTION);
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@ -457,7 +462,7 @@ static void exynos5420_pm_resume(void)
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if (exynos_pm_central_resume())
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goto early_wakeup;
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pmu_raw_writel(exynos_pmu_spare3, S5P_PMU_SPARE3);
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pmu_raw_writel(pm_state.pmu_spare3, S5P_PMU_SPARE3);
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early_wakeup:
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@ -654,4 +659,13 @@ void __init exynos_pm_init(void)
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register_syscore_ops(&exynos_pm_syscore_ops);
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suspend_set_ops(&exynos_suspend_ops);
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/*
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* Applicable as of now only to Exynos542x. If booted under secure
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* firmware, the non-secure region of sysram should be used.
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*/
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if (exynos_secure_firmware_available())
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pm_state.sysram_base = sysram_ns_base_addr;
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else
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pm_state.sysram_base = sysram_base_addr;
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}
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@ -219,17 +219,6 @@ static void gta02_udc_vbus_draw(unsigned int ma)
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#define gta02_udc_vbus_draw NULL
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#endif
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/*
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* This is called when pc50633 is probed, unfortunately quite late in the
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* day since it is an I2C bus device. Here we can belatedly define some
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* platform devices with the advantage that we can mark the pcf50633 as the
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* parent. This makes them get suspended and resumed with their parent
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* the pcf50633 still around.
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*/
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static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf);
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static char *gta02_batteries[] = {
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"battery",
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};
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@ -355,7 +344,6 @@ static struct pcf50633_platform_data gta02_pcf_pdata = {
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},
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},
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.probe_done = gta02_pmu_attach_child_devices,
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.mbc_event_callback = gta02_pmu_event_callback,
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};
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@ -512,36 +500,6 @@ static struct platform_device *gta02_devices[] __initdata = {
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&s3c_device_ts,
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};
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/* These guys DO need to be children of PMU. */
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static struct platform_device *gta02_devices_pmu_children[] = {
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};
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/*
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* This is called when pc50633 is probed, quite late in the day since it is an
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* I2C bus device. Here we can define platform devices with the advantage that
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* we can mark the pcf50633 as the parent. This makes them get suspended and
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* resumed with their parent the pcf50633 still around. All devices whose
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* operation depends on something from pcf50633 must have this relationship
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* made explicit like this, or suspend and resume will become an unreliable
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* hellworld.
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*/
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static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf)
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{
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int n;
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/* Grab a copy of the now probed PMU pointer. */
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gta02_pcf = pcf;
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for (n = 0; n < ARRAY_SIZE(gta02_devices_pmu_children); n++)
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gta02_devices_pmu_children[n]->dev.parent = pcf->dev;
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platform_add_devices(gta02_devices_pmu_children,
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ARRAY_SIZE(gta02_devices_pmu_children));
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}
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static void gta02_poweroff(void)
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{
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pcf50633_reg_set_bit_mask(gta02_pcf, PCF50633_REG_OOCSHDWN, 1, 1);
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@ -64,31 +64,31 @@ static struct map_desc mini2440_iodesc[] __initdata = {
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};
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#define UCON S3C2410_UCON_DEFAULT
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#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
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#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
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#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
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#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
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static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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};
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@ -104,8 +104,8 @@ static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
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/*
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* This macro simplifies the table bellow
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*/
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#define _LCD_DECLARE(_clock,_xres,margin_left,margin_right,hsync, \
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_yres,margin_top,margin_bottom,vsync, refresh) \
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#define _LCD_DECLARE(_clock, _xres, margin_left, margin_right, hsync, \
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_yres, margin_top, margin_bottom, vsync, refresh) \
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.width = _xres, \
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.xres = _xres, \
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.height = _yres, \
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@ -128,7 +128,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
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[0] = { /* mini2440 + 3.5" TFT + touchscreen */
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_LCD_DECLARE(
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7, /* The 3.5 is quite fast */
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240, 21, 38, 6, /* x timing */
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240, 21, 38, 6, /* x timing */
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320, 4, 4, 2, /* y timing */
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60), /* refresh rate */
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.lcdcon5 = (S3C2410_LCDCON5_FRM565 |
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@ -140,7 +140,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
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[1] = { /* mini2440 + 7" TFT + touchscreen */
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_LCD_DECLARE(
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10, /* the 7" runs slower */
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800, 40, 40, 48, /* x timing */
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800, 40, 40, 48, /* x timing */
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480, 29, 3, 3, /* y timing */
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50), /* refresh rate */
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.lcdcon5 = (S3C2410_LCDCON5_FRM565 |
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@ -148,7 +148,7 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
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S3C2410_LCDCON5_INVVFRAME |
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S3C2410_LCDCON5_PWREN),
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},
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/* The VGA shield can outout at several resolutions. All share
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/* The VGA shield can outout at several resolutions. All share
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* the same timings, however, anything smaller than 1024x768
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* will only be displayed in the top left corner of a 1024x768
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* XGA output unless you add optional dip switches to the shield.
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@ -158,9 +158,10 @@ static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
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_LCD_DECLARE(
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10,
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1024, 1, 2, 2, /* y timing */
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768, 200, 16, 16, /* x timing */
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768, 200, 16, 16, /* x timing */
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24), /* refresh rate, maximum stable,
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tested with the FPGA shield */
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* tested with the FPGA shield
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*/
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.lcdcon5 = (S3C2410_LCDCON5_FRM565 |
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S3C2410_LCDCON5_HWSWP),
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},
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@ -196,7 +197,8 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
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/* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
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* and disable the pull down resistors on pins we are using for LCD
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* data. */
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* data.
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*/
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.gpcup = (0xf << 1) | (0x3f << 10),
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@ -232,10 +234,11 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
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/* MMC/SD */
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static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = {
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.gpio_detect = S3C2410_GPG(8),
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.gpio_wprotect = S3C2410_GPH(8),
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.set_power = NULL,
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.ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34,
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.gpio_detect = S3C2410_GPG(8),
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.gpio_wprotect = S3C2410_GPH(8),
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.wprotect_invert = 1,
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.set_power = NULL,
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.ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34,
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};
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/* NAND Flash on MINI2440 board */
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@ -254,7 +257,8 @@ static struct mtd_partition mini2440_default_nand_part[] __initdata = {
|
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[2] = {
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.name = "kernel",
|
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/* 5 megabytes, for a kernel with no modules
|
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* or a uImage with a ramdisk attached */
|
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* or a uImage with a ramdisk attached
|
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*/
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.size = 0x00500000,
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.offset = SZ_256K + SZ_128K,
|
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},
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@ -271,7 +275,7 @@ static struct s3c2410_nand_set mini2440_nand_sets[] __initdata = {
|
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.nr_chips = 1,
|
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.nr_partitions = ARRAY_SIZE(mini2440_default_nand_part),
|
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.partitions = mini2440_default_nand_part,
|
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.flash_bbt = 1, /* we use u-boot to create a BBT */
|
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.flash_bbt = 1, /* we use u-boot to create a BBT */
|
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},
|
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};
|
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|
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@ -282,7 +286,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
|
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.nr_sets = ARRAY_SIZE(mini2440_nand_sets),
|
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.sets = mini2440_nand_sets,
|
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.ignore_unset_ecc = 1,
|
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.ecc_mode = NAND_ECC_HW,
|
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.ecc_mode = NAND_ECC_HW,
|
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};
|
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|
||||
/* DM9000AEP 10/100 ethernet controller */
|
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@ -290,7 +294,7 @@ static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
|
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static struct resource mini2440_dm9k_resource[] = {
|
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[0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4),
|
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[1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4),
|
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[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
|
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[2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ
|
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| IORESOURCE_IRQ_HIGHEDGE),
|
||||
};
|
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|
||||
@ -362,7 +366,8 @@ static struct gpio_keys_button mini2440_buttons[] = {
|
||||
},
|
||||
#if 0
|
||||
/* this pin is also known as TCLK1 and seems to already
|
||||
* marked as "in use" somehow in the kernel -- possibly wrongly */
|
||||
* marked as "in use" somehow in the kernel -- possibly wrongly
|
||||
*/
|
||||
{
|
||||
.gpio = S3C2410_GPG(11), /* K6 */
|
||||
.code = KEY_F6,
|
||||
@ -564,7 +569,8 @@ static char mini2440_features_str[12] __initdata = "0tb";
|
||||
static int __init mini2440_features_setup(char *str)
|
||||
{
|
||||
if (str)
|
||||
strlcpy(mini2440_features_str, str, sizeof(mini2440_features_str));
|
||||
strlcpy(mini2440_features_str, str,
|
||||
sizeof(mini2440_features_str));
|
||||
return 1;
|
||||
}
|
||||
|
||||
@ -583,10 +589,10 @@ struct mini2440_features_t {
|
||||
};
|
||||
|
||||
static void __init mini2440_parse_features(
|
||||
struct mini2440_features_t * features,
|
||||
const char * features_str )
|
||||
struct mini2440_features_t *features,
|
||||
const char *features_str)
|
||||
{
|
||||
const char * fp = features_str;
|
||||
const char *fp = features_str;
|
||||
|
||||
features->count = 0;
|
||||
features->done = 0;
|
||||
@ -598,13 +604,14 @@ static void __init mini2440_parse_features(
|
||||
switch (f) {
|
||||
case '0'...'9': /* tft screen */
|
||||
if (features->done & FEATURE_SCREEN) {
|
||||
printk(KERN_INFO "MINI2440: '%c' ignored, "
|
||||
"screen type already set\n", f);
|
||||
pr_info("MINI2440: '%c' ignored, screen type already set\n",
|
||||
f);
|
||||
} else {
|
||||
int li = f - '0';
|
||||
|
||||
if (li >= ARRAY_SIZE(mini2440_lcd_cfg))
|
||||
printk(KERN_INFO "MINI2440: "
|
||||
"'%c' out of range LCD mode\n", f);
|
||||
pr_info("MINI2440: '%c' out of range LCD mode\n",
|
||||
f);
|
||||
else {
|
||||
features->optional[features->count++] =
|
||||
&s3c_device_lcd;
|
||||
@ -615,8 +622,8 @@ static void __init mini2440_parse_features(
|
||||
break;
|
||||
case 'b':
|
||||
if (features->done & FEATURE_BACKLIGHT)
|
||||
printk(KERN_INFO "MINI2440: '%c' ignored, "
|
||||
"backlight already set\n", f);
|
||||
pr_info("MINI2440: '%c' ignored, backlight already set\n",
|
||||
f);
|
||||
else {
|
||||
features->optional[features->count++] =
|
||||
&mini2440_led_backlight;
|
||||
@ -624,13 +631,13 @@ static void __init mini2440_parse_features(
|
||||
features->done |= FEATURE_BACKLIGHT;
|
||||
break;
|
||||
case 't':
|
||||
printk(KERN_INFO "MINI2440: '%c' ignored, "
|
||||
"touchscreen not compiled in\n", f);
|
||||
pr_info("MINI2440: '%c' ignored, touchscreen not compiled in\n",
|
||||
f);
|
||||
break;
|
||||
case 'c':
|
||||
if (features->done & FEATURE_CAMERA)
|
||||
printk(KERN_INFO "MINI2440: '%c' ignored, "
|
||||
"camera already registered\n", f);
|
||||
pr_info("MINI2440: '%c' ignored, camera already registered\n",
|
||||
f);
|
||||
else
|
||||
features->optional[features->count++] =
|
||||
&s3c_device_camif;
|
||||
@ -645,7 +652,7 @@ static void __init mini2440_init(void)
|
||||
struct mini2440_features_t features = { 0 };
|
||||
int i;
|
||||
|
||||
printk(KERN_INFO "MINI2440: Option string mini2440=%s\n",
|
||||
pr_info("MINI2440: Option string mini2440=%s\n",
|
||||
mini2440_features_str);
|
||||
|
||||
/* Parse the feature string */
|
||||
@ -674,17 +681,17 @@ static void __init mini2440_init(void)
|
||||
mini2440_fb_info.displays =
|
||||
&mini2440_lcd_cfg[features.lcd_index];
|
||||
|
||||
printk(KERN_INFO "MINI2440: LCD");
|
||||
pr_info("MINI2440: LCD");
|
||||
for (li = 0; li < ARRAY_SIZE(mini2440_lcd_cfg); li++)
|
||||
if (li == features.lcd_index)
|
||||
printk(" [%d:%dx%d]", li,
|
||||
pr_cont(" [%d:%dx%d]", li,
|
||||
mini2440_lcd_cfg[li].width,
|
||||
mini2440_lcd_cfg[li].height);
|
||||
else
|
||||
printk(" %d:%dx%d", li,
|
||||
pr_cont(" %d:%dx%d", li,
|
||||
mini2440_lcd_cfg[li].width,
|
||||
mini2440_lcd_cfg[li].height);
|
||||
printk("\n");
|
||||
pr_cont("\n");
|
||||
s3c24xx_fb_set_platdata(&mini2440_fb_info);
|
||||
}
|
||||
|
||||
|
||||
@ -256,7 +256,7 @@ config S3C_PM_DEBUG_LED_SMDK
|
||||
|
||||
config SAMSUNG_PM_CHECK
|
||||
bool "S3C2410 PM Suspend Memory CRC"
|
||||
depends on PM
|
||||
depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210)
|
||||
select CRC32
|
||||
help
|
||||
Enable the PM code's memory area checksum over sleep. This option
|
||||
|
||||
Loading…
Reference in New Issue
Block a user