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KVM: MIPS: Use CP0_BadInstr[P] for emulation
When exiting from the guest, store the values of the CP0_BadInstr and CP0_BadInstrP registers if they exist, which contain the encodings of the instructions which caused the last synchronous exception. When the instruction is needed for emulation, kvm_get_badinstr() and kvm_get_badinstrp() are used instead of calling kvm_get_inst() directly, to decide whether to read the saved CP0_BadInstr/CP0_BadInstrP registers (if they exist), or read the instruction from memory (if not). The use of these registers should be more robust than using kvm_get_inst(), as it actually gives the instruction encoding seen by the hardware rather than relying on user accessors after the fact, which can be fooled by incoherent icache or a racing code modification. It will also work with VZ, where the guest virtual memory isn't directly accessible by the host with user accessors. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org
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@ -280,6 +280,8 @@ struct kvm_vcpu_arch {
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unsigned long host_cp0_badvaddr;
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unsigned long host_cp0_epc;
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u32 host_cp0_cause;
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u32 host_cp0_badinstr;
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u32 host_cp0_badinstrp;
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/* GPRS */
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unsigned long gprs[32];
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@ -641,6 +643,8 @@ void kvm_trap_emul_invalidate_gva(struct kvm_vcpu *vcpu, unsigned long addr,
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/* Emulation */
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int kvm_get_inst(u32 *opc, struct kvm_vcpu *vcpu, u32 *out);
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enum emulation_result update_pc(struct kvm_vcpu *vcpu, u32 cause);
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int kvm_get_badinstr(u32 *opc, struct kvm_vcpu *vcpu, u32 *out);
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int kvm_get_badinstrp(u32 *opc, struct kvm_vcpu *vcpu, u32 *out);
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/**
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* kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault.
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@ -54,7 +54,7 @@ static int kvm_compute_return_epc(struct kvm_vcpu *vcpu, unsigned long instpc,
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}
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/* Read the instruction */
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err = kvm_get_inst((u32 *)epc, vcpu, &insn.word);
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err = kvm_get_badinstrp((u32 *)epc, vcpu, &insn.word);
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if (err)
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return err;
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@ -258,6 +258,48 @@ enum emulation_result update_pc(struct kvm_vcpu *vcpu, u32 cause)
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return EMULATE_DONE;
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}
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/**
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* kvm_get_badinstr() - Get bad instruction encoding.
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* @opc: Guest pointer to faulting instruction.
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* @vcpu: KVM VCPU information.
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*
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* Gets the instruction encoding of the faulting instruction, using the saved
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* BadInstr register value if it exists, otherwise falling back to reading guest
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* memory at @opc.
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*
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* Returns: The instruction encoding of the faulting instruction.
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*/
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int kvm_get_badinstr(u32 *opc, struct kvm_vcpu *vcpu, u32 *out)
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{
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if (cpu_has_badinstr) {
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*out = vcpu->arch.host_cp0_badinstr;
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return 0;
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} else {
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return kvm_get_inst(opc, vcpu, out);
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}
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}
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/**
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* kvm_get_badinstrp() - Get bad prior instruction encoding.
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* @opc: Guest pointer to prior faulting instruction.
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* @vcpu: KVM VCPU information.
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*
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* Gets the instruction encoding of the prior faulting instruction (the branch
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* containing the delay slot which faulted), using the saved BadInstrP register
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* value if it exists, otherwise falling back to reading guest memory at @opc.
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*
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* Returns: The instruction encoding of the prior faulting instruction.
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*/
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int kvm_get_badinstrp(u32 *opc, struct kvm_vcpu *vcpu, u32 *out)
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{
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if (cpu_has_badinstrp) {
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*out = vcpu->arch.host_cp0_badinstrp;
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return 0;
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} else {
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return kvm_get_inst(opc, vcpu, out);
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}
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}
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/**
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* kvm_mips_count_disabled() - Find whether the CP0_Count timer is disabled.
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* @vcpu: Virtual CPU.
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@ -1839,7 +1881,7 @@ enum emulation_result kvm_mips_emulate_inst(u32 cause, u32 *opc,
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/* Fetch the instruction. */
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if (cause & CAUSEF_BD)
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opc += 1;
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err = kvm_get_inst(opc, vcpu, &inst.word);
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err = kvm_get_badinstr(opc, vcpu, &inst.word);
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if (err)
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return EMULATE_FAIL;
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@ -2434,7 +2476,7 @@ enum emulation_result kvm_mips_handle_ri(u32 cause, u32 *opc,
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/* Fetch the instruction. */
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if (cause & CAUSEF_BD)
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opc += 1;
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err = kvm_get_inst(opc, vcpu, &inst.word);
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err = kvm_get_badinstr(opc, vcpu, &inst.word);
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if (err) {
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kvm_err("%s: Cannot get inst @ %p (%d)\n", __func__, opc, err);
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return EMULATE_FAIL;
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@ -53,6 +53,8 @@
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/* Some CP0 registers */
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#define C0_HWRENA 7, 0
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#define C0_BADVADDR 8, 0
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#define C0_BADINSTR 8, 1
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#define C0_BADINSTRP 8, 2
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#define C0_ENTRYHI 10, 0
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#define C0_STATUS 12, 0
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#define C0_CAUSE 13, 0
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@ -579,6 +581,18 @@ void *kvm_mips_build_exit(void *addr)
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uasm_i_mfc0(&p, K0, C0_CAUSE);
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uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), K1);
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if (cpu_has_badinstr) {
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uasm_i_mfc0(&p, K0, C0_BADINSTR);
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uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch,
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host_cp0_badinstr), K1);
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}
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if (cpu_has_badinstrp) {
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uasm_i_mfc0(&p, K0, C0_BADINSTRP);
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uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch,
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host_cp0_badinstrp), K1);
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}
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/* Now restore the host state just enough to run the handlers */
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/* Switch EBASE to the one used by Linux */
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@ -1471,7 +1471,7 @@ int kvm_mips_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
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if (cause & CAUSEF_BD)
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opc += 1;
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inst = 0;
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kvm_get_inst(opc, vcpu, &inst);
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kvm_get_badinstr(opc, vcpu, &inst);
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kvm_err("Exception Code: %d, not yet handled, @ PC: %p, inst: 0x%08x BadVaddr: %#lx Status: %#lx\n",
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exccode, opc, inst, badvaddr,
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kvm_read_c0_guest_status(vcpu->arch.cop0));
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